Microelectronic devices with an embedded die substrate on an interposer are described. For example, a microelectronic device includes a substrate housing an embedded die. At least one surface die is retained above a first outermost surface of the substrate. An interposer is retained proximate a second outermost surface of the substrate.

An electronic device comprises a “waterproof” package including a substrate of an organic material permeable to humidity and/or moisture as well as one or more electronic components arranged on the substrate. The substrate comprises a barrier layer capable of countering penetration of humidity and/or moisture into the package through the organic material substrate.

LTCC structure extends between top and bottom surfaces, with at least one cavity being formed within the structure and extending from the top surface inwardly in the direction of the bottom surface. A die is disposed within the cavity a top surface of the die is positioned flush with the top surface of the package, resulted in the shortest length of the wire box connecting the die with the LTCC structure and ultimately reducing the inductance.

An integrated circuit package and a method of forming the same are provided. A method includes attaching a first side of an integrated circuit die to a carrier. An encapsulant is formed over and around the integrated circuit die. The encapsulant is patterned to form a first opening laterally spaced apart from the integrated circuit die and a second opening over the integrated circuit die. The first opening extends through the encapsulant. The second opening exposes a second side of the integrated circuit die. The first side of the integrated circuit die is opposite the second side of the integrated circuit die. A conductive material is simultaneously deposited in the first opening and the second opening.

The present disclosure relates to the field of integrated circuit package design and, more particularly, to packages using a bumpless build-up layer (BBUL) designs. Embodiments of the present description relate to the field of fabricating microelectronic packages, wherein an interposer, such as a through-silicon via interposer, may be used in a bumpless build-up layer package to facilitate stacked microelectronic components.

A display device is disclosed. The display device includes a substrate having a plurality of pixels, wherein each of the plurality of pixels includes at least one light emitting chip, and a structure on one side of at least one of the plurality of pixels. A base material of the light emitting chip is the same as a base material of the structure.

An example of a method of making a printed structure comprises providing a destination substrate, contact pads disposed on the destination substrate, and a layer of adhesive disposed on the destination substrate. A stamp with a component adhered to the stamp is provided. The component comprises a stamp side in contact with the stamp and a post side opposite the stamp side, a circuit, and connection posts extending from the post side. Each of the connection posts is electrically connected to the circuit. The component is pressed into contact with the adhesive layer to adhere the component to the destination substrate and to form a printed structure having a volume defined between the component and the destination substrate. The stamp is removed and the printed structure is processed to fill or reduce the volume.

A semiconductor package structure includes a semiconductor device with an active surface, a conductive pillar on the conductive pad, an adhesion strengthening layer, and an encapsulant in contact with the adhesion strengthening layer. The conductive pillar has a side surface and a top surface. The adhesion strengthening layer is conformally disposed on the side surface of the conductive pillar and the active surface of the semiconductor device.

Optical sensor modules and methods of fabrication are described. In an embodiment, an optical component is mounted on a module substrate. In an embodiment, a pillar of stacked wireballs adjacent the optical component is used for vertical connection between the module substrate and a top electrode pad of the optical component.

A Fan-Out package having a main die and a dummy die side-by-side is provided. A molding material is formed along sidewalls of the main die and the dummy die, and a redistribution layer having a plurality of vias and conductive lines is positioned over the main die and the dummy die, where the plurality of vias and the conductive lines are electrically connected to connectors of the main die.