H01L2224/37139

Lead frame for hermetic RF chip package embedded with impedance matching function
11342250 · 2022-05-24 · ·

A lead frame for a hermetic RF chip package includes: a first capacitor unit formed of a conductive material in a rectangular shape having a width smaller than a length to receive an input of an RF signal applied to the package circuit; a first inductor unit connected to the first capacitor unit and formed of a conductive material in a rectangular shape having a width greater than a length; a second capacitor unit connected to the first inductor unit and formed of a conductive material in a rectangular shape having a width smaller than a length; and a second inductor unit connected to the second capacitor unit and formed of a conductive material in a rectangular shape having a width greater than a length to transfer an RF signal input through the first capacitor unit to the RF chip.

Lead frame for hermetic RF chip package embedded with impedance matching function
11342250 · 2022-05-24 · ·

A lead frame for a hermetic RF chip package includes: a first capacitor unit formed of a conductive material in a rectangular shape having a width smaller than a length to receive an input of an RF signal applied to the package circuit; a first inductor unit connected to the first capacitor unit and formed of a conductive material in a rectangular shape having a width greater than a length; a second capacitor unit connected to the first inductor unit and formed of a conductive material in a rectangular shape having a width smaller than a length; and a second inductor unit connected to the second capacitor unit and formed of a conductive material in a rectangular shape having a width greater than a length to transfer an RF signal input through the first capacitor unit to the RF chip.

SEMICONDUCTOR PACKAGE

A semiconductor package according to an embodiment of the present invention Includes: a lead frame comprising a pad and a lead spaced apart from the pad by a regular interval; a semiconductor chip adhered on the pad; and a clip structure electrically connecting the semiconductor chip and the lead, wherein an one end of the clip structure connected to the semiconductor chip inclines with respect to upper surfaces of chip pads of the semiconductor chip and is adhered to the upper surfaces of the chip pads of the semiconductor chip. A semiconductor package according to another embodiment of the present invention includes: a semiconductor chip comprising one or more chip pads; one or more leads electrically connected to the chip pads; and a sealing member covering the semiconductor chip, wherein an one end of the lead inclines with respect to one surface of the chip pad and is adhered to the chip pad and an other end of the lead is exposed to the outside of the sealing member.

SEMICONDUCTOR PACKAGE

A semiconductor package according to an embodiment of the present invention Includes: a lead frame comprising a pad and a lead spaced apart from the pad by a regular interval; a semiconductor chip adhered on the pad; and a clip structure electrically connecting the semiconductor chip and the lead, wherein an one end of the clip structure connected to the semiconductor chip inclines with respect to upper surfaces of chip pads of the semiconductor chip and is adhered to the upper surfaces of the chip pads of the semiconductor chip. A semiconductor package according to another embodiment of the present invention includes: a semiconductor chip comprising one or more chip pads; one or more leads electrically connected to the chip pads; and a sealing member covering the semiconductor chip, wherein an one end of the lead inclines with respect to one surface of the chip pad and is adhered to the chip pad and an other end of the lead is exposed to the outside of the sealing member.

Semiconductor package with connection lug

A semiconductor package includes a first die pad, a first semiconductor die mounted on the first die pad, an encapsulant body of electrically insulating material that encapsulates first die pad and the first semiconductor die, a plurality of package leads that each protrude out of a first outer face of the encapsulant body, a connection lug that protrudes out of a second outer face of the encapsulant body, the second outer face being opposite from the first outer face. The first semiconductor die includes first and second voltage blocking terminals. The connection lug is electrically connected to one of the first and second voltage blocking terminals of the first semiconductor die. A first one of the package leads is electrically connected to an opposite one of the first and second voltage blocking terminals of the first semiconductor die that the first connection lug is electrically connected to.

Semiconductor package with connection lug

A semiconductor package includes a first die pad, a first semiconductor die mounted on the first die pad, an encapsulant body of electrically insulating material that encapsulates first die pad and the first semiconductor die, a plurality of package leads that each protrude out of a first outer face of the encapsulant body, a connection lug that protrudes out of a second outer face of the encapsulant body, the second outer face being opposite from the first outer face. The first semiconductor die includes first and second voltage blocking terminals. The connection lug is electrically connected to one of the first and second voltage blocking terminals of the first semiconductor die. A first one of the package leads is electrically connected to an opposite one of the first and second voltage blocking terminals of the first semiconductor die that the first connection lug is electrically connected to.

Integrated Circuit Having Die Attach Materials with Channels and Process of Implementing the Same
20210351113 · 2021-11-11 ·

A package includes an integrated circuit that includes at least one active area and at least one secondary device area, a support configured to support the integrated circuit, and a die attach material. The integrated circuit being mounted on the support using the die attach material and the die attach material including at least one channel configured to allow gases generated during curing of the die attach material to be released from the die attach material.

Integrated Circuit Having Die Attach Materials with Channels and Process of Implementing the Same
20210351113 · 2021-11-11 ·

A package includes an integrated circuit that includes at least one active area and at least one secondary device area, a support configured to support the integrated circuit, and a die attach material. The integrated circuit being mounted on the support using the die attach material and the die attach material including at least one channel configured to allow gases generated during curing of the die attach material to be released from the die attach material.

Metal paste for joints, assembly, production method for assembly, semiconductor device, and production method for semiconductor device

Provided is a metal paste for joints, containing: metal particles; and linear or branched monovalent aliphatic alcohol having 1 to 20 carbon atoms, in which the metal particles include sub-micro copper particles having a volume average particle diameter of 0.12 μm to 0.8 μM.

Metal paste for joints, assembly, production method for assembly, semiconductor device, and production method for semiconductor device

Provided is a metal paste for joints, containing: metal particles; and linear or branched monovalent aliphatic alcohol having 1 to 20 carbon atoms, in which the metal particles include sub-micro copper particles having a volume average particle diameter of 0.12 μm to 0.8 μM.