To improve reliability of a semiconductor device. There are provided the semiconductor device and a method of manufacturing the same, the semiconductor including a pad electrode that is formed over a semiconductor substrate and includes a first conductive film and a second conductive film formed over the first conductive film, and a plating film that is formed over the second conductive film and used to be coupled to an external connection terminal (TR). The first conductive film and the second conductive film contains mainly aluminum. The crystal surface on the surface of the first conductive film is different from the crystal surface on the surface of the second conductive film.

A semiconductor device provided with first and second semiconductor element each having an obverse and a reverse surface with a drain electrode, source electrode and gate electrode provided on the obverse surface. The semiconductor device is also provided with a control element electrically connected to the gate electrodes of the respective semiconductor elements, and with a plurality of leads, which include a first lead carrying the first semiconductor element, a second lead carrying the second semiconductor element, and a third lead carrying the control element. The first and second leads overlap with each other as viewed in a first direction perpendicular to the thickness direction of the semiconductor device, and the third lead overlaps with the first and second leads as viewed in a second direction perpendicular to the thickness direction and the first direction.

A semiconductor device provided with first and second semiconductor element each having an obverse and a reverse surface with a drain electrode, source electrode and gate electrode provided on the obverse surface. The semiconductor device is also provided with a control element electrically connected to the gate electrodes of the respective semiconductor elements, and with a plurality of leads, which include a first lead carrying the first semiconductor element, a second lead carrying the second semiconductor element, and a third lead carrying the control element. The first and second leads overlap with each other as viewed in a first direction perpendicular to the thickness direction of the semiconductor device, and the third lead overlaps with the first and second leads as viewed in a second direction perpendicular to the thickness direction and the first direction.

A semiconductor device manufacturing method, includes: a preparing process for preparing a conductive plate, a semiconductor chip arranged over the conductive plate with a first bonding material therebetween, and a connection terminal including a bonding portion arranged over the semiconductor chip with a second bonding material therebetween; a first jig arrangement process for arranging a first guide jig, through which a first guide hole pierces, over the conductive plate, such that the first guide hole corresponds to the bonding portion in a plan view of the semiconductor device; and a first pressing process for inserting a pillar-shaped pressing jig, which includes a pressing portion at a lower end portion thereof, into the first guide hole, and pressing the bonding portion of the connection terminal to a side of the conductive plate with the pressing portion.

A semiconductor device includes metal connector plate having a first lower surface, facing an electrode of a semiconductor chip, a first end surface, a second end surface, and a second lower surface connecting the first end surface and the second end surface. In a first direction parallel to the semiconductor chip, an end surface of the electrode is located between the positions of the first end surface and the second end surface. A distance from the second lower surface to the electrode is greater than a distance from the first lower surface to the electrode. A joining component has a first portion between the first lower surface and the electrode and a second portion between the second lower surface and the electrode.

A semiconductor device includes metal connector plate having a first lower surface, facing an electrode of a semiconductor chip, a first end surface, a second end surface, and a second lower surface connecting the first end surface and the second end surface. In a first direction parallel to the semiconductor chip, an end surface of the electrode is located between the positions of the first end surface and the second end surface. A distance from the second lower surface to the electrode is greater than a distance from the first lower surface to the electrode. A joining component has a first portion between the first lower surface and the electrode and a second portion between the second lower surface and the electrode.

Various teachings of the present disclosure include a method for welding an attachment piece to a semiconductor metallization using laser welding. The method may include: arranging an attachment piece having a flat side with a thin point so the flat side faces the semiconductor metallization; and welding the flat side to the semiconductor metallization. The flat side rests against a flat side of the semiconductor metallization over an entire surface area of the flat side. The thin point is formed with a cup shape of the attachment piece. The cup shape is open in the direction away from the semiconductor metallization.

Various teachings of the present disclosure include a method for welding an attachment piece to a semiconductor metallization using laser welding. The method may include: arranging an attachment piece having a flat side with a thin point so the flat side faces the semiconductor metallization; and welding the flat side to the semiconductor metallization. The flat side rests against a flat side of the semiconductor metallization over an entire surface area of the flat side. The thin point is formed with a cup shape of the attachment piece. The cup shape is open in the direction away from the semiconductor metallization.

A method of fabricating a semiconductor device is disclosed. In one aspect, the method includes placing a first semiconductor chip on a carrier with the first main surface of the first semiconductor chip facing the carrier. A first layer of soft solder material is provided between the first main surface and the carrier. Heat is applied during placing so that a temperature at the first layer of soft solder material is equal to or higher than a melting temperature of the first layer of soft solder material. A second layer of soft solder material is provided between the first contact area and the second main surface. Heat is applied during placing so that a temperature at the second layer of soft solder material is equal to or higher than a melting temperature of the second layer of soft solder material. The first and second layers of soft solder material are cooled to solidify the soft solder materials.

A method of fabricating a semiconductor device is disclosed. In one aspect, the method includes placing a first semiconductor chip on a carrier with the first main surface of the first semiconductor chip facing the carrier. A first layer of soft solder material is provided between the first main surface and the carrier. Heat is applied during placing so that a temperature at the first layer of soft solder material is equal to or higher than a melting temperature of the first layer of soft solder material. A second layer of soft solder material is provided between the first contact area and the second main surface. Heat is applied during placing so that a temperature at the second layer of soft solder material is equal to or higher than a melting temperature of the second layer of soft solder material. The first and second layers of soft solder material are cooled to solidify the soft solder materials.