A semiconductor module is provided with a conductive member having one end, in a longitudinal direction, joined to an electrode of a semiconductor element that is mounted on an insulating substrate, the other end of the conductive member in the longitudinal direction being joined to a component different from the electrode. The conductive member is made up of a metal sheet, and has a bent portion at the one end and at the other end. The bent portion provided at the one end has a cut in a leading end portion, in the longitudinal direction, and an end joining section at which the cut is not present is joined to the electrode of the semiconductor element. As a result, a semiconductor module can be realized that allows combination of increased current capacity with improved reliability.

The object is to provide a technique that can prevent cracks from appearing in an undesirable portion in a resin. A semiconductor device includes an electronic circuit including a semiconductor element, a metal electrode directly connected to the electronic circuit, and an encapsulation resin. The encapsulation resin encapsulates the electronic circuit and the metal electrode. An end portion of the metal electrode on a surface opposite to a surface facing the electronic circuit is acute-shaped, and an end portion of the metal electrode on the surface facing the electronic circuit is arc-shaped or obtuse-shaped.

Packaging solutions for devices and systems comprising lateral GaN power transistors are disclosed, including components of a packaging assembly, a semiconductor device structure, and a method of fabrication thereof. In the packaging assembly, a GaN die, comprising one or more lateral GaN power transistors, is sandwiched between first and second leadframe layers, and interconnected using low inductance interconnections, without wirebonding. For thermal dissipation, the dual leadframe package assembly can be configured for either front-side or back-side cooling. Preferred embodiments facilitate alignment and registration of high current/low inductance interconnects for lateral GaN devices, in which contact areas or pads for source, drain and gate contacts are provided on the front-side of the GaN die. By eliminating wirebonding, and using low inductance interconnections with high electrical and thermal conductivity, PQFN technology can be adapted for packaging GaN die comprising one or more lateral GaN power transistors.

A second lead frame is set onto a conductive layer and a busbar. The second lead frame has holes previously formed at opposite ends thereof, and pieces of solder material or solder pieces are inserted into the holes. Then, the solder pieces are vibrated by an ultrasonically vibrating tool, whereby the solder pieces are melted without having a high temperature. The second lead frame is thus bonded to the conductive layer and the busbar. A semiconductor element and the busbar are connected by a first lead frame and the second lead frame. The connection structure thereof is such that the second lead frame to be bonded by ultrasonic bonding or other bonding methods is not directly in contact with the semiconductor element, which eliminates the risk of damage to the semiconductor element.

An object is to provide highly reliable semiconductor element bonding portion and semiconductor device that have high heat resistance and improved adhesion between a bonding material and a sealing resin. Provided is a semiconductor element bonding portion in which the semiconductor element 11 and an electrically conductive plate 123a are bonded to each other by a bonding layer 10 and the bonding layer 10 includes a metal nanoparticle sintered body 101 and a coupling agent 102 including an SH group.

A semiconductor module is provided, including: a cooling-target device; a first cooling unit on which the cooling-target device is placed and that has a flow channel through which a refrigerant for cooling the cooling-target device flows; and a second cooling unit to which the first cooling unit is fixed and that has a flow channel coupled with the flow channel of the first cooling unit. Also, a semiconductor module manufacturing method is provided, including: placing a cooling-target device on a first cooling unit that has a flow channel through which a refrigerant for cooling the cooling-target device flows; and fixing the first cooling unit to a second cooling unit that has a flow channel coupled with the flow channel of the first cooling unit.

One aspect of the invention relates to an electronic module comprising a module housing and an electrically conductive connection element. The connection element has a first portion and a second portion, and also a shaft between the first portion and the second portion. The connection element, which is provided with a non-metallic coating in the region of the shaft, is injected together with the coating in the region of the shaft into the module housing, such that the connection element is fixed in the module housing.

A power electronic circuit device has a substrate, with multiple conductive tracks, and a power semiconductor component on these conductive tracks has a connection device with a metal sheet which electrically connects a contact pad of the power semiconductor component to a contact pad of a further power semiconductor component or a conductive track, and has a pressure device. The connection device includes a contact section for connection to an assigned contact pad and a connecting section arranged between the two contact sections. The pressure device includes a two-dimensional resilient pressure element that comprises pressure element sections, and first pressure element sections press with a first pressure surface section onto a contact section and second pressure element section presses with a second pressure surface section press onto the connecting section.

The semiconductor device includes a supporting member, a conductive member, and a semiconductor element. The supporting member has a supporting surface facing in a thickness direction. The conductive member has an obverse surface facing the same side as the supporting surface faces in the thickness direction, and a reverse surface opposite to the obverse surface. The conductive member is bonded to the supporting member such that the reverse surface faces the supporting surface. The semiconductor element is bonded to the obverse surface. The semiconductor device further includes a first metal layer and a second metal layer. The first metal layer covers at least a part of the supporting surface. The second metal layer covers the reverse surface. The first metal layer and the second layer are bonded to each other by solid phase diffusion.

An electronic device includes: a first semiconductor die having a metal region; a substrate having a plurality of metal regions; a first soldered joint between the metal region of the first semiconductor die and a first metal region of the substrate, the first soldered joint having one or more intermetallic phases throughout the entire soldered joint, each of the one or more intermetallic phases formed from a solder preform diffused into the metal region of the first semiconductor die and the first metal region of the substrate; and a second semiconductor die soldered to the first or different metal region of the substrate.