Patent classifications
H01L2224/40227
Semiconductor module and semiconductor module manufacturing method
A semiconductor module includes a laminated substrate that includes a heat radiating plate, and an insulation layer having a conductive pattern thereof and being disposed on a top surface of the heat radiating plate, a semiconductor element disposed on a top surface of the conductive pattern, an integrated circuit that controls driving of the semiconductor element, a control-side lead frame having a primary surface on which the integrated circuit is disposed, and a mold resin that seals the laminated substrate, the semiconductor element, the integrated circuit, and the control-side lead frame. The control-side lead frame has a rod-shaped first pin having a first end, a first end side of the first pin extending toward the top surface of the heat radiating plate, and the heat radiating plate has at least one insertion hole into one of which the first end of the first pin is press-fitted.
Integrated Circuit Having Die Attach Materials with Channels and Process of Implementing the Same
A package includes an integrated circuit that includes at least one active area and at least one secondary device area, a support configured to support the integrated circuit, and a die attach material. The integrated circuit being mounted on the support using the die attach material and the die attach material including at least one channel configured to allow gases generated during curing of the die attach material to be released from the die attach material.
Systems and processes for increasing semiconductor device reliability
A system configured to increase a reliability of electrical connections in a device. The system including a lead configured to electrically connect a pad of at least one support structure to a pad of at least one electrical component. The lead includes an upper portion that includes a lower surface arranged on a lower surface thereof. The lower surface of the upper portion is arranged vertically above a first upper surface of a first pad connection portion; and the lower surface of the upper portion is arranged vertically above a second upper surface of the second pad connection portion. A process configured to increase a reliability of electrical connections in a device is also disclosed.
MOLDED ELECTRONIC PACKAGE AND METHOD FOR MANUFACTURING THE SAME
Aspects of the present disclosure relate to a molded electronic package and a method for manufacturing the same. The molded electronic package includes a first substrate, a second substrate, an electronic component arranged on the first substrate, a spring member arranged between the second substrate and the electronic component, the spring member including a first contact portion being fixated relative to the second substrate, and a second contact portion physically contacting the electronic component, and a body of solidified molding compound configured to encapsulate the electronic component and the spring member and to mutually fixate the first substrate, the second substrate, the electronic component and the spring member. The second substrate and the spring member are electrically and/or thermally conductive.
SEMICONDUCTOR MODULE AND METHOD FOR MANUFACTURING THE SAME
A semiconductor module includes: a semiconductor chip including a main electrode; a connection conductor electrically connected to the main electrode; a housing portion surrounding the semiconductor chip and at least a part of the connection conductor; a sealing material filled in a space surrounded by the housing portion; and a connection unit fixed to the housing portion. The conductive portion, which is a part of the connection conductor, is exposed from a surface of the sealing material. The connection unit includes: a connection terminal joined to the conductive portion of the connection conductor; and a support that is formed separately from the housing portion and supports the connection terminal.
Power electronics system with a switching device and a liquid cooling device
A power electronics system has a switching device and a liquid cooling device. A switching device has a plate element, and power semiconductor devices are arranged on conductor tracks and connected by means of a connecting device, wherein the liquid cooling device has a first partial body having an inlet volume region and an outlet volume region and a second partial body. A cooling volume region is formed between the two partial bodies, wherein heat transfer bodies protrude into the cooling volume region from the second partial body. The second partial body is arranged in a recess of the first partial body and the two partial bodies are connected to each other and have a common plane surface which forms a first main surface.
Method for forming a pre-connection layer on a surface of a connection partner and method for monitoring a connection process
A method for forming a connection between two connection partners includes: forming a pre-connection layer on a first surface of a first connection partner, the pre-connection layer including a certain amount of liquid; performing a pre-connection process, thereby removing liquid from the pre-connection layer; performing photometric measurements while performing the pre-connection process, wherein performing the photometric measurements includes determining at least one photometric parameter of the pre-connection layer, wherein the at least one photometric parameter changes depending on the fluid content of the pre-connection layer; and constantly evaluating the at least one photometric parameter, wherein the pre-connection process is terminated when the at least one photometric parameter is detected to be within a desired range.
Semiconductor device with a supporting member and bonded metal layers
The semiconductor device includes a supporting member, a conductive member, and a semiconductor element. The supporting member has a supporting surface facing in a thickness direction. The conductive member has an obverse surface facing the same side as the supporting surface faces in the thickness direction, and a reverse surface opposite to the obverse surface. The conductive member is bonded to the supporting member such that the reverse surface faces the supporting surface. The semiconductor element is bonded to the obverse surface. The semiconductor device further includes a first metal layer and a second metal layer. The first metal layer covers at least a part of the supporting surface. The second metal layer covers the reverse surface. The first metal layer and the second layer are bonded to each other by solid phase diffusion.
System in package with interconnected modules
Embodiments include systems in packages (SiPs) and a method of forming the SiPs. A SiP includes a package substrate and a first modularized sub-package over the package substrate, where the first modularized sub-package includes a plurality of electrical components, a first mold layer, and a redistribution layer. The SiP also includes a stack of dies over the package substrate, where the first modularized sub-package is disposed between the stack of dies. The SiP further includes a plurality of interconnects coupled to the stack of dies, the first modularized sub-package, and the package substrate, wherein the redistribution layer of the first modularized sub-package couples the stack of dies to the package substrate with the plurality of interconnects. The SiP may enable the redistribution layer of the first modularized sub-package to couple the electrical components to the stacked dies and the package substrate without a solder interconnect.
POWER MODULE PACKAGE
A power module package is provided. The power module package includes an electronic assembly that includes a substrate and a power device group. The substrate includes an insulating layer, a circuit pattern layer, and a conductive heat-dissipating layer. The circuit pattern layer and the conductive heat-dissipating layer are respectively disposed at two opposite sides of the insulating layer. The power device group is disposed on the circuit pattern layer, and the power device group and the circuit pattern layer are configured to form a common circuit. A total area of the conductive heat-dissipating layer is greater than that of the circuit pattern layer, and a thickness of the circuit pattern layer is greater than that of the insulating layer.