Patent classifications
H01L2224/40227
ELECTRONIC MODULE
An electronic module has a first substrate 11, a first electronic element 13 provided on one side of the first substrate 11, a first connection body 60 provided on one side of the first electronic element 13, a second electronic element 23 provided on one side of the first connection body 60, a second substrate 21 provided on one side of the second electronic element 23, and an abutment body 250 that abuts on a face on one side of the second electronic element 23 and is capable of imparting a force toward one side with respect to the second substrate 21.
ELECTRONIC MODULE
An electronic module has a first electronic unit having a first substrate 11, a first conductor layer 12 provided on one side of the first substrate 11, and a first electronic element 13 provided on one side of the first conductor layer 12, a first connection body 60 provided on one side of the first electronic element 13, and a second electronic unit having a second electronic element 23 provided on one side of the first connection body 60. The first connection body 60 has a first head part 61 and a plurality of support parts 65 extending from the first head part 61. The electronic module is characterized by that the support part 65 abuts on the first substrate 11 or the first conductor layer 12.
ELECTRONIC MODULE
An electronic module has a first substrate 11, an electronic element 13 provided on one side of the first substrate 13, a second substrate 21 provided on one side of the electronic element 13 and a positioning part 200 extending from the first substrate 11 to one side and abutting a circumferential part of the second substrate 21, or extending from the second substrate 21 to the other side and abutting against a circumferential part of the first substrate 11.
SEMICONDUCTOR CHIP PACKAGE COMPRISING SUBSTRATE, SEMICONDUCTOR CHIP, AND LEADFRAME AND A METHOD FOR FABRICATING THE SAME
A semiconductor chip package is provided with improved connections between different components within the package. The semiconductor chip package may comprise a semiconductor chip disposed on a substrate. The semiconductor chip may have a first surface and a second surface. The first surface of the semiconductor chip may be connected to the substrate. The semiconductor chip package may comprise a leadframe that includes a first lead and a second lead. The first lead of the leadframe may be directly attached to the second surface of the semiconductor chip. The second lead of the leadframe may be directly attached to the substrate.
Electronic module, lead frame and manufacturing method for electronic module
An electronic module has a first substrate 11, a first electronic element 13, a second electronic element 23, a second substrate 21, a first terminal part 110 and a second terminal part 120. The first terminal part 110 has a first terminal base end part 111, a first terminal outer part 113, and a first bending part 112 that is provided between the first terminal base end part 111 and the first terminal outer part 113 and that is bent toward the other side on a side of the first terminal base end part 111. The second terminal part 120 has a second terminal base end part 121, a second terminal outer part 123, and a second bending part 122 that is provided between the second terminal base end part 121 and the second terminal outer part 123 and that is bent toward one side on a side of the second terminal base end part 121.
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE HAVING A BOND WIRE OR CLIP BONDED TO A BONDING PAD
A method of manufacturing a semiconductor device includes: forming a base portion of a bonding pad on a semiconductor portion, the base portion further comprising a base layer; forming a main surface of the bonding pad, the main surface comprising a bonding region; bonding a bond wire or clip to the bonding region; and forming a supplemental structure directly on the base portion. The supplemental structure laterally adjoins the bond wire or clip or is laterally spaced apart from the bond wire or clip. A volume-related specific heat capacity of the supplemental structure is higher than a volume-related specific heat capacity of the base layer.
Semiconductor chip package comprising a leadframe connected to a substrate and a semiconductor chip, and a method for fabricating the same
A semiconductor chip package may comprise a semiconductor chip disposed on a substrate. The semiconductor chip may have a first surface and a second surface. The first surface of the semiconductor chip may be connected to the substrate. The semiconductor chip package may comprise a leadframe that includes a first lead and a second lead. The first lead of the leadframe may be directly attached to the second surface of the semiconductor chip. The second lead of the leadframe may be directly attached to the substrate. An important aspect in development of the semiconductor chip package is improvement of connections between different components within the package.
METAL TAB FOR CHIP ASSEMBLY
A semiconductor die having a metal tab connected thereto. The metal tab includes at least one slot on at least one side of the metal tab, wherein the at least one slot i) creates an opening between at least two portions of the metal tab and ii) exposes the semiconductor die in relation to the metal tab. The semiconductor die can be a silicon (Si) die and the metal tab can be a copper (Cu) tab, where the at least one slot includes at least four slots corresponding to each of at least four sides of the metal, and wherein with respect to each of the at least four sides, each corresponding slot i) creates an opening between at least two portions of the Cu metal tab and ii) exposes the Si semiconductor die in relation to the Cu metal tab.
WIRING STRUCTURE AND SEMICONDUCTOR MODULE
A lead frame structure for connecting a semiconductor chip to a connection target includes a conductive member electrically connecting the semiconductor chip and the connection target. The conductive member includes a first bonding part having a main surface, disposed on one side of the conductive member and being bonded to the semiconductor chip, a second bonding part having a main surface, being disposed on another side of the conductive member that is spaced from the one side in one direction and being bonded to the connection target, and a joining part having a wall section intersecting the main surface of the first bonding part and the main surface of the second bonding part, the wall section joining a portion of the first bonding part to a portion of the second bonding part.
Stray inductance reduction in packaged semiconductor devices
In a general aspect, a semiconductor device can include a substrate and a positive power supply terminal electrically coupled with the substrate, the positive power supply terminal being arranged in a first plane. The device can also include a first negative power supply terminal, laterally disposed from the positive power supply terminal and arranged in the first plane. The device can further include a second negative power supply terminal, laterally disposed from the positive power supply terminal and arranged in the first plane. The positive power supply terminal can be disposed between the first and second negative power supply terminals. The device can also include a conductive clip electrically coupling the first negative power supply terminal with the second negative power supply terminal via a conductive bridge. A portion of the conductive bridge can be arranged in a second plane that is parallel to, and non-coplanar with the first plane.