A semiconductor device includes: a semiconductor element including a first electrode; a conductive member including a first bonding part facing the first electrode; a bonding layer interposed between the first electrode and the first bonding part; and a regulator bonded to at least one of the first electrode and the first bonding part. The regulator faces the bonding layer in a direction orthogonal to a thickness direction of the semiconductor element.

A semiconductor device provided with first and second semiconductor element each having an obverse and a reverse surface with a drain electrode, source electrode and gate electrode provided on the obverse surface. The semiconductor device is also provided with a control element electrically connected to the gate electrodes of the respective semiconductor elements, and with a plurality of leads, which include a first lead carrying the first semiconductor element, a second lead carrying the second semiconductor element, and a third lead carrying the control element. The first and second leads overlap with each other as viewed in a first direction perpendicular to the thickness direction of the semiconductor device, and the third lead overlaps with the first and second leads as viewed in a second direction perpendicular to the thickness direction and the first direction.

A semiconductor package includes: a semiconductor transistor die having an emitter/source contact pad, a drain/collector contact pad, and a gate contact pad; at least two electrical connectors disposed in a symmetrical manner on opposing lateral sides of the semiconductor die and connected with at least one of the contact pads; and an encapsulant embedding the semiconductor transistor die. The two or more electrical connectors extend through the encapsulant and form protruding sections above an upper surface of the encapsulant.

A power semiconductor package comprises a leadframe comprising a first die pad, a second die pad and a plurality of external contacts. The first and second die pads are separated by a first gap. A power semiconductor die is arranged on and electrically coupled to a first side of the first die pad. A diode is arranged on and electrically coupled to a first side of the second die pad. A molded body encapsulates the power semiconductor die and the diode, the molded body having a first side, an opposite second side and lateral sides connecting the first and second sides. A second side of the first die pad is exposed from the second side of the molded body. A second side of the second die pad is completely covered by an electrically insulating material.

A semiconductor die is arranged at a die mounting location of an electrically conductive substrate. The electrically conductive substrate includes an array of electrically conductive leads having openings at the periphery of the electrically conductive substrate. An electrically conductive clip is arranged in a bridge-like position between the semiconductor die and an electrically conductive lead in the array of electrically conductive leads to provide electrical coupling therebetween. The electrically conductive clip has an end coupled to the electrically conductive lead, wherein the end includes: a planar proximal portion configured to contact the electrically conductive lead proximally of the openings, and a distal portion projecting beyond the proximal portion distally thereof, the distal portion provided with sculpturing configured to engage the openings to facilitate immobilizing the electrically conductive clip in the bridge-like position between the semiconductor chip and electrically conductive lead.

A semiconductor device provided with first and second semiconductor element each having an obverse and a reverse surface with a drain electrode, source electrode and gate electrode provided on the obverse surface. The semiconductor device is also provided with a control element electrically connected to the gate electrodes of the respective semiconductor elements, and with a plurality of leads, which include a first lead carrying the first semiconductor element, a second lead carrying the second semiconductor element, and a third lead carrying the control element. The first and second leads overlap with each other as viewed in a first direction perpendicular to the thickness direction of the semiconductor device, and the third lead overlaps with the first and second leads as viewed in a second direction perpendicular to the thickness direction and the first direction.

A clip tape includes connected clip sets; each includes a first clip and a second clip oriented in a same direction, connected by a connector bar. A first multi-chip module and a second multi-chip module are formed by providing a lead frame array containing lead frame units, and providing a clip tape containing connected clip sets. A connected clip set is separated from the clip tape as a unit and placed on the lead frame array; the first clip in the first multi-chip module, and the second clip in the second multi-chip module. The connector bar remains attached during a heating operation, and is severed by a singulation process. A multi-chip module includes a lead frame unit, a semiconductor device, and a clip of a connected clip set attached to the semiconductor device. A connector bar extends from the clip to an external surface of the multi-chip module.

A semiconductor package is disclosed. In one example, the semiconductor package includes a package body. A first diepad is at least partially uncovered by the package body at the first main surface. A second diepad is at least partially uncovered by the package body at the first main surface. A first semiconductor chip is arranged on the first diepad. A second semiconductor chip is arranged on the second diepad. The semiconductor package further includes at least one lead protruding out of the package body at the side surface. A first groove is formed in the first main surface, wherein the first groove is arranged between the first diepad and the second diepad, and a second groove is formed in the first main surface, wherein the second groove is arranged between the at least one lead and at least one of the first diepad and the second diepad.