A semiconductor device includes: a substrate; a semiconductor element arranged on the substrate; a plate-like member electrically connected to the semiconductor element; a first electrode formed on the semiconductor element and joined to the plate-like member with solder; a second electrode formed on the semiconductor element and spaced from the first electrode, and including a metal capable of forming an alloy with the solder; and a metal film formed on the semiconductor element and spaced from the second electrode in a region on the first electrode side as seen from the second electrode, in a two-dimensional view of the semiconductor element as seen from the plate-like member, and including a metal capable of forming an alloy with the solder.

An object is to provide a power module in which adhesion of a sealing resin is sufficient and which is highly reliable. The power module includes: an insulative board in which a pattern of a conductor layer is formed on a ceramic plate; power semiconductor elements placed on the insulative board; lead frames each in a plate shape connecting from electrodes of the power semiconductor elements to screw-fastening terminal portions; and a sealing resin portion that seals connection portions between the power semiconductor elements and the lead frames, and regions around the connection portions; wherein, in the lead frames, opening portions are formed at positions where each of the lead frames at least partly overlaps, in planar view, with a portion of the insulative board on which the conductor layer is not formed.

An object is to provide a power module in which adhesion of a sealing resin is sufficient and which is highly reliable. The power module includes: an insulative board in which a pattern of a conductor layer is formed on a ceramic plate; power semiconductor elements placed on the insulative board; lead frames each in a plate shape connecting from electrodes of the power semiconductor elements to screw-fastening terminal portions; and a sealing resin portion that seals connection portions between the power semiconductor elements and the lead frames, and regions around the connection portions; wherein, in the lead frames, opening portions are formed at positions where each of the lead frames at least partly overlaps, in planar view, with a portion of the insulative board on which the conductor layer is not formed.

A power module includes a plurality of conductive wire groups and a sealing member. The plurality of conductive wire groups each include a first bonded portion and a second bonded portion. A maximum gap between intermediate portions of a pair of conductive wire groups adjacent to each other is larger than a first gap between the first bonded portions of the pair of conductive wire groups adjacent to each other. The maximum gap between the intermediate portions of the pair of conductive wire groups adjacent to each other is larger than a second gap between the second bonded portions of the pair of conductive wire groups adjacent to each other. Therefore, the power module is improved in reliability.

A power module includes a plurality of conductive wire groups and a sealing member. The plurality of conductive wire groups each include a first bonded portion and a second bonded portion. A maximum gap between intermediate portions of a pair of conductive wire groups adjacent to each other is larger than a first gap between the first bonded portions of the pair of conductive wire groups adjacent to each other. The maximum gap between the intermediate portions of the pair of conductive wire groups adjacent to each other is larger than a second gap between the second bonded portions of the pair of conductive wire groups adjacent to each other. Therefore, the power module is improved in reliability.

A printed circuit board is disclosed. The printed circuit board includes: a substrate layer; a copper layer disposed on the substrate layer; and an organic solderability preservative (OSP) layer disposed on the copper layer. The OSP layer defines one or more laser treated OSP surfaces.

A printed circuit board is disclosed. The printed circuit board includes: a substrate layer; a copper layer disposed on the substrate layer; and an organic solderability preservative (OSP) layer disposed on the copper layer. The OSP layer defines one or more laser treated OSP surfaces.

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.