H01L2224/45624

Molded package with chip carrier comprising brazed electrically conductive layers

A method of manufacturing a package, wherein the method comprises a forming a chip carrier by covering a thermally conductive and electrically insulating core on both opposing main surfaces thereof at least partially by a respective electrically conductive layer by brazing the respective electrically conductive layer on a respective one of the main surfaces; a mounting at least one electronic chip on the chip carrier; an electrically coupling an electrically conductive contact structure with the at least one electronic chip; and an encapsulating part of the electrically conductive contact structure, and at least part of the chip carrier and of the at least one electronic chip by a mold-type encapsulant.

Semiconductor device
10256169 · 2019-04-09 · ·

A highly-reliable semiconductor device has improved adhesion between a sealing material and a sealed metal member and/or a case member. In some implementations, the semiconductor device includes: a laminated substrate on which a semiconductor element is mounted; and a sealing material. In some implementations, the sealing material contains an epoxy base resin, a curing agent, and a phosphonic acid.

Semiconductor device
10256169 · 2019-04-09 · ·

A highly-reliable semiconductor device has improved adhesion between a sealing material and a sealed metal member and/or a case member. In some implementations, the semiconductor device includes: a laminated substrate on which a semiconductor element is mounted; and a sealing material. In some implementations, the sealing material contains an epoxy base resin, a curing agent, and a phosphonic acid.

SEMICONDUCTOR APPARATUS

A semiconductor apparatus includes: a case made of resin; an insert terminal including an external terminal portion embedded in the case and having a first terminal exposed from the case, and an internal terminal portion bent in a L shape with respect to a second terminal of the external terminal portion and having a first surface exposed from the case and an anchor part in close contact with the case; and a bonding wire bonded to the first surface of the internal terminal portion.

SUBSTRATE-LESS STACKABLE PACKAGE WITH WIRE-BOND INTERCONNECT
20190096803 · 2019-03-28 · ·

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

SUBSTRATE-LESS STACKABLE PACKAGE WITH WIRE-BOND INTERCONNECT
20190096803 · 2019-03-28 · ·

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

SEMICONDUCTOR DEVICE PACKAGE WITH VERTICALLY STACKED PASSIVE COMPONENT
20240258288 · 2024-08-01 ·

In a described example, an apparatus includes: a package substrate with conductive leads; a semiconductor die mounted to the package substrate, the semiconductor die having a first thickness; electrical connections coupling bond pads on the semiconductor die to conductive leads on the package substrate; brackets attached to the package substrate spaced from the semiconductor die and extending away from the package substrate to a distance from the package substrate that is greater than the first thickness of the semiconductor die; and mold compound covering the package substrate, the semiconductor die, the brackets, and the semiconductor die to form a semiconductor device package having a board side surface and a top surface opposite the board side surface, and having portions of the brackets exposed from the mold compound on the top surface of the semiconductor device package to form mounts for a passive component.

LIGHT EMITTING APPARATUS
20190027667 · 2019-01-24 · ·

A light emitting apparatus includes a positive lead terminal and a negative lead terminal, each of which includes a first main surface, a second main surface, and an end surface including a first recessed surface area extending from a first point of the first main surface in cross section, and a second recessed surface area extending from a second point of the second main surface in cross section. A distance between a first part of the end surface of the positive lead terminal and a second part of the end surface of the negative lead terminal than a first distance between the first points of the positive lead terminal and the negative lead terminal and a second distance between the second points of the positive lead terminal and the negative lead terminal. The first part and the second part are separated from the first point and the second point.

SEMICONDUCTOR DEVICE AND FABRICATION METHOD OF THE SEMICONDUCTOR DEVICE
20190019771 · 2019-01-17 ·

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.

SEMICONDUCTOR DEVICE AND FABRICATION METHOD OF THE SEMICONDUCTOR DEVICE
20190019771 · 2019-01-17 ·

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.