H01L2224/45669

Substrate-less stackable package with wire-bond interconnect
10170412 · 2019-01-01 · ·

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

Substrate-less stackable package with wire-bond interconnect
10170412 · 2019-01-01 · ·

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

Bonding wire for semiconductor device

A bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer on a surface of the Cu alloy core material, and contains Ga and Ge of 0.011 to 1.2% by mass in total, which is able to increase bonding longevity of the ball bonded part in the high-temperature, high-humidity environment, and thus to improve the bonding reliability. The thickness of the Pd coating layer is preferably 0.015 to 0.150 m. When the bonding wire further contains one or more elements of Ni, Ir, and Pt in an amount, for each element, of 0.011 to 1.2% by mass, it is able to improve the reliability of the ball bonded part in a high-temperature environment at 175 C. or more. When an alloy skin layer containing Au and Pd is further formed on a surface of the Pd coating layer, wedge bondability improves.

Bonding wire for semiconductor device

A bonding wire for a semiconductor device includes a Cu alloy core material and a Pd coating layer on a surface of the Cu alloy core material, and contains Ga and Ge of 0.011 to 1.2% by mass in total, which is able to increase bonding longevity of the ball bonded part in the high-temperature, high-humidity environment, and thus to improve the bonding reliability. The thickness of the Pd coating layer is preferably 0.015 to 0.150 m. When the bonding wire further contains one or more elements of Ni, Ir, and Pt in an amount, for each element, of 0.011 to 1.2% by mass, it is able to improve the reliability of the ball bonded part in a high-temperature environment at 175 C. or more. When an alloy skin layer containing Au and Pd is further formed on a surface of the Pd coating layer, wedge bondability improves.

Electronic component, semiconductor package, and electronic device using the same
10083136 · 2018-09-25 · ·

An electronic component, a semiconductor package, and an electronic device including the electronic component and/or the semiconductor package are provided. The electronic component includes an electronic element; an encapsulation member that encapsulates the electronic element and has a first surface and a second surface substantially parallel to each other; and a lead electrically connected to the electronic element and extending outward from the encapsulation member. The lead is disposed entirely in a region between a plane of the first surface of the encapsulation member and a plane of the second surface of the encapsulation member.

Electronic component, semiconductor package, and electronic device using the same
10083136 · 2018-09-25 · ·

An electronic component, a semiconductor package, and an electronic device including the electronic component and/or the semiconductor package are provided. The electronic component includes an electronic element; an encapsulation member that encapsulates the electronic element and has a first surface and a second surface substantially parallel to each other; and a lead electrically connected to the electronic element and extending outward from the encapsulation member. The lead is disposed entirely in a region between a plane of the first surface of the encapsulation member and a plane of the second surface of the encapsulation member.

Substrate-Less Stackable Package With Wire-Bond Interconnect
20180233448 · 2018-08-16 · ·

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

Substrate-Less Stackable Package With Wire-Bond Interconnect
20180233448 · 2018-08-16 · ·

A method for making a microelectronic unit includes forming a plurality of wire bonds on a first surface in the form of a conductive bonding surface of a structure comprising a patternable metallic element. The wire bonds are formed having bases joined to the first surface and end surfaces remote from the first surface. The wire bonds have edge surfaces extending between the bases and the end surfaces. The method also includes forming a dielectric encapsulation layer over a portion of the first surface of the conductive layer and over portions of the wire bonds such that unencapsulated portions of the wire bonds are defined by end surfaces or portions of the edge surfaces that are unconvered by the encapsulation layer. The metallic element is patterned to form first conductive elements beneath the wire bonds and insulated from one another by portions of the encapsulation layer.

Copper-based alloy wire and methods for manufaturing the same
09997488 · 2018-06-12 ·

A copper-based alloy wire made of a material selected from the group consisting of a copper-gold alloy, a copper-palladium alloy and a copper-gold-palladium alloy is provided. The alloy wire has a polycrystalline structure of a face-centered cubic lattice and consists of a plurality of equi-axial grains. The quantity of grains having annealing twins is 10 percent or more of the total quantity of the grains of the copper-based alloy wire.

Copper-based alloy wire and methods for manufaturing the same
09997488 · 2018-06-12 ·

A copper-based alloy wire made of a material selected from the group consisting of a copper-gold alloy, a copper-palladium alloy and a copper-gold-palladium alloy is provided. The alloy wire has a polycrystalline structure of a face-centered cubic lattice and consists of a plurality of equi-axial grains. The quantity of grains having annealing twins is 10 percent or more of the total quantity of the grains of the copper-based alloy wire.