Patent classifications
H
ELECTRICITY
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H01
ELECTRIC ELEMENTS
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H01L
SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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2224/00
Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
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H01L2224/01
Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
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H01L2224/42
Wire connectors; Manufacturing methods related thereto
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H01L2224/47
Structure, shape, material or disposition of the wire connectors after the connecting process
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H01L2224/48
of an individual wire connector
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H01L2224/48151
Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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H01L2224/48153
the body and the item being arranged next to each other, e.g. on a common substrate
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H01L2224/48179
the bond pad protruding from the surface of the item
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H01L2224/48179

SEMICONDUCTOR DEVICE
20250239560 · 2025-07-24 · ·

A semiconductor device includes: a plurality of semiconductor chips mounted to an insulating substrate; and a case housing them. The case has a gate terminal, a source sense terminal, a source terminal, and a drain terminal. The gate terminal and the source sense terminal are at different heights, and the source terminal is at a smaller height than the gate terminal and the source sense terminal.