Patent classifications
H01L2224/48227
Semiconductor device
A semiconductor device includes: a thick copper member in which a semiconductor chip is mounted; a printed circuit board that is disposed on a front surface of the thick copper member and provided with an opening exposing a part of the front surface of the thick copper member, a wiring pattern, and conductive vias connecting the pattern and the thick copper member; a semiconductor chip mounted on the front surface of the thick copper member exposed through the opening and connected to the pattern by a metal wire; an electronic component mounted on a front surface of the printed circuit board opposite to a side facing the thick copper member and connected to the pattern; and a cap or an epoxy resin sealing the front surface of the printed circuit board opposite to a side facing the thick copper member, the chip, the component, and the metal wire.
Semiconductor device
A semiconductor device including a substrate; a chip on which a surface electrode is formed; and a lead. The lead includes a first electrode connecting portion disposed on the surface electrode and electrically connected to the surface electrode of the chip via a conductive bonding material; a second electrode connecting portion electrically connected to an electrode portion of a wiring pattern. A lead connected to the first electrode connecting portion and the second electrode connecting portion. The lead further has a thermal shrinking stress equalizing structure on a portion of an outer periphery of the first electrode connecting portion. The lead is configured to make a thermal shrinking stress applied to a conductive bonding material between the first electrode connecting portion and the surface electrode equal.
Semiconductor device
A semiconductor device including a substrate; a chip on which a surface electrode is formed; and a lead. The lead includes a first electrode connecting portion disposed on the surface electrode and electrically connected to the surface electrode of the chip via a conductive bonding material; a second electrode connecting portion electrically connected to an electrode portion of a wiring pattern. A lead connected to the first electrode connecting portion and the second electrode connecting portion. The lead further has a thermal shrinking stress equalizing structure on a portion of an outer periphery of the first electrode connecting portion. The lead is configured to make a thermal shrinking stress applied to a conductive bonding material between the first electrode connecting portion and the surface electrode equal.
Semiconductor packages and methods of forming the semiconductor packages
A package substrate of a semiconductor package includes conductive lines of a first layer disposed on a first surface of a base layer and conductive lines of a second layer disposed on a second surface of the base layer. An opening hole located between a first remaining portion and a second remaining portion to separate the first and second remaining portions from each other. The first remaining portion is electrically connected to a first conductive line among the conductive lines of the second layer, and the second remaining portion is electrically connected to a second conductive line among the conductive lines of the second layer.
WIRING BASE, PACKAGE FOR STORING SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR DEVICE
A wiring base includes a base having a first surface, at least one metal layer positioned on the first surface, at least one lead terminal positioned on the metal layer, and a joining member that is positioned on the metal layer and joins the lead terminal to the metal layer. The lead terminal has a first portion to be in contact with the joining member and also has a second portion being continuous with the first portion. In a cross section of the lead terminal orthogonal to a longitudinal direction of the lead terminal, the first portion has two concave surfaces that are formed near the metal layer so as to be disposed opposite to each other across a center in a transverse direction of the lead terminal.
WIRING BASE, PACKAGE FOR STORING SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR DEVICE
A wiring base includes a base having a first surface, at least one metal layer positioned on the first surface, at least one lead terminal positioned on the metal layer, and a joining member that is positioned on the metal layer and joins the lead terminal to the metal layer. The lead terminal has a first portion to be in contact with the joining member and also has a second portion being continuous with the first portion. In a cross section of the lead terminal orthogonal to a longitudinal direction of the lead terminal, the first portion has two concave surfaces that are formed near the metal layer so as to be disposed opposite to each other across a center in a transverse direction of the lead terminal.
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREFOR
A semiconductor package of the present invention comprises a base plate, an insulating substrate, and a lead frame, wherein the base plate is made of a metallic material including Cu and Be—Cu. The present invention can ensure bonding reliability and thus prevent performance degradation of semiconductor devices.
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
The present disclosure provides an electronic package. The electronic package includes a substrate, a first electronic component, an encapsulant, and a shielding layer. The substrate has a first upper surface, a second upper surface, and a first lateral surface extending between the first upper surface and the second upper surface. The first electronic component is disposed on the substrate. The encapsulant coves the first electronic component and the first lateral surface of the substrate. The shielding layer covers the encapsulant. The shielding layer is spaced apart from the first lateral surface of the substrate.
SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
The present disclosure provides an electronic package. The electronic package includes a substrate, a first electronic component, an encapsulant, and a shielding layer. The substrate has a first upper surface, a second upper surface, and a first lateral surface extending between the first upper surface and the second upper surface. The first electronic component is disposed on the substrate. The encapsulant coves the first electronic component and the first lateral surface of the substrate. The shielding layer covers the encapsulant. The shielding layer is spaced apart from the first lateral surface of the substrate.
Semiconductor device and semiconductor device manufacturing method
A semiconductor device includes a semiconductor element, a base plate, and a plurality of contact materials. The base plate has a front surface holding the semiconductor element and a rear surface to which a cooling body to cool the semiconductor element is attachable. The plurality of contact materials are discretely arranged on the rear surface of the base plate. The plurality of contact materials are materials for bridging a gap on a heat dissipation path between the base plate and the cooling body. The plurality of contact materials each have a volume based on a bowed shape of the rear surface of the base plate. From among the plurality of contact materials, a contact material at a concave of the bowed shape has a greater volume than a contact material at a convex of the bowed shape.