Patent classifications
H01L2224/4823
Integrated circuit package for assembling various dice in a single IC package
An integrated circuit IC package with one or more pins protruding from the IC package for electrically connecting the IC package with a printed circuit board PCB is presented. The IC package has a first die with a first electronic component, a second die with a second electronic component, and a conductive plate having a plane surface. The first electronic component may be a semiconductor power device and the second electronic component may be a control circuit. The plane surface of the conductive plate is electrically connected to both a plane surface of the first die and one or more pins such that an electrical connection is established between the first die and the one or more pins. The second die may be arranged on top of the conductive plate. Alternatively, a third die with a third electronic component may be arranged on top of the conductive plate.
Semiconductor light emitting apparatus, stem part
A semiconductor light emitting apparatus includes: a stem part having a stem base, a lead terminal, and a metal member having a closed shape, the stem base having an inner portion having a first face, a second face and an opening extending in a first direction from the first face to the second face, and an outer portion surrounding the inner portion, the inner and outer portions being arranged along a reference plane intersecting the first direction, the lead terminal being supported in the opening, and the metal member being disposed on the outer portion so as to surround the inner portion and having a first portion supported by a top face of the outer portion, and a second portion extending outward with reference to an edge of the outer portion; a semiconductor optical element disposed on the inner portion; and a cap disposed on the metal member.
PACKAGED SEMICONDUCTOR DEVICES AND METHODS FOR PRODUCING PACKAGED SEMICONDUCTOR DEVICES
A packaged semiconductor device comprises a semiconductor chip and a semiconductor package. The semiconductor package comprises: a metal carrier, wherein the semiconductor chip is arranged on a main surface of the metal carrier, a metal cap arranged on the main surface of the metal carrier, wherein the metal carrier and the metal cap form a cavity, wherein the semiconductor chip is arranged within the cavity, a connection conductor extending from the main surface of the metal carrier to a main surface of the semiconductor package through the metal carrier, wherein the connection conductor is electrically insulated from the metal carrier and is electrically connected to the semiconductor chip, and a connecting material arranged on a first region of the connection conductor and serving for electrically and mechanically connecting the connection conductor to an external printed circuit board, wherein at least that part of the connection conductor which extends from the main surface of the metal carrier as far as the first region of the connection conductor is formed in integral fashion.
Package for mounting light-emitting device
A light-emitting device mounting package includes a substrate, a frame extending upward from the substrate and surrounding a mounting portion, a lead plate supported on the frame, and a ceramic plate having a facing front surface and a facing back surface on the opposite side. The frame has a first through hole through which the lead terminal extends. The ceramic plate has a second through hole, and a metalized layer formed on the facing front surface such that the metalized layer is spaced from an opening of the second through hole. The lead plate penetrates the first and second through holes and is fixed, via a collar portion, to a region of the facing back surface around an opening of the second through hole on the facing back surface side. The insulating member is fixed to a region around the first through hole via the metalized layer.
Power module having control substrate mounted above power substrate with control substrate drivers located between the power substrate power transistors
An electronic device includes a first substrate, a wiring substrate (second substrate) disposed over the first substrate, and an enclosure (case) in which the first substrate and the wiring substrate are accommodated and that has a first side and a second side. A driver component (semiconductor component) is mounted on the wiring substrate. A gate electrode of a first semiconductor component is electrically connected to the driver component via a lead disposed on a side of the first side and a wiring disposed between the driver component and the first side. A gate electrode of a second semiconductor component is electrically connected to the driver component via a lead disposed on a side of the second side and a wiring disposed between the driver component and the second side.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
A semiconductor device includes a conductive plate having a front surface on which a semiconductor element is mounted and a sealing resin sealing therein at least the front surface of the conductive plate. The conductive plate includes a structure that traps bubbles in a region where flows of the injected sealing resin merge. The conductive plate has a rectangular shape. The sealing resin is injected from a single inlet on a first longitudinal side of the conductive plate. The region where the flows of the sealing resin merge is a region of a corner of a second longitudinal side that across the semiconductor element, opposes the first longitudinal side from which the sealing resin is injected.
TRANSISTOR OUTLINE HOUSING WITH HIGH RETURN LOSS
A transistor outline housing is provided that includes a header for an optoelectronic component. The header has electrical feedthroughs in the form of connection pins embedded in a potting compound. The header has a recess in which at least one of the connection pins in one of the feedthroughs extends out of the lower surface of the header.
Die crack detector and method therefor
A die crack detector and method are provided. A first metal trace is formed over a substrate with the first metal trace configured to extend around a perimeter of a semiconductor die. A second metal trace is formed over the first metal trace with the second metal trace configured to overlap the first metal trace. A dielectric material is disposed between the first and second metal traces. A first detector terminal is coupled to the first metal trace and a second detector terminal coupled to the second metal trace. The detector terminals are configured to receive a predetermined voltage.
Semiconductor module
A semiconductor module includes a metal substrate having a mounting surface, a first conductive plate on the mounting surface, an insulating substrate on the first conductive plate, a second conductive plate on the insulating substrate, a conductive pad on the insulating substrate, a semiconductor element on the second conductive plate, a circuit board electrically connected to the conductive pad, a resin case connected to the metal substrate and extending along at least a portion thereof, and around the first conductive plate, the insulating substrate, the second conductive plate, the conductive pad, the semiconductor element, and the circuit board, and a silicone gel in a region bounded by the metal substrate and the resin case. The circuit board comprises a plurality of planar surfaces oriented perpendicular to the mounting surface of the metal substrate.
DIE CRACK DETECTOR AND METHOD THEREFOR
A die crack detector and method are provided. A first metal trace is formed over a substrate with the first metal trace configured to extend around a perimeter of a semiconductor die. A second metal trace is formed over the first metal trace with the second metal trace configured to overlap the first metal trace. A dielectric material is disposed between the first and second metal traces. A first detector terminal is coupled to the first metal trace and a second detector terminal coupled to the second metal trace. The detector terminals are configured to receive a predetermined voltage.