Patent classifications
H01L2224/48257
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
A semiconductor device includes a substrate having a first surface and a second surface, the second surface being opposite to the first surface, the substrate having an opening formed from the first surface toward the second surface; a semiconductor device layer having a third surface facing the second surface; and a heat transfer member disposed in the opening, the heat transfer member being configured to transfer heat generated by the semiconductor device layer to the first surface, wherein the heat transfer member includes a diamond layer and a metal layer, the diamond layer covering a bottom surface and an inner wall surface of the opening, and the metal layer being disposed on the diamond layer.
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD
A semiconductor device includes a substrate having a first surface and a second surface, the second surface being opposite to the first surface, the substrate having an opening formed from the first surface toward the second surface; a semiconductor device layer having a third surface facing the second surface; and a heat transfer member disposed in the opening, the heat transfer member being configured to transfer heat generated by the semiconductor device layer to the first surface, wherein the heat transfer member includes a diamond layer and a metal layer, the diamond layer covering a bottom surface and an inner wall surface of the opening, and the metal layer being disposed on the diamond layer.
Package with dies mounted on opposing surfaces of a leadframe
A package includes a leadframe having first surface and a second surface opposing the first surface, the leadframe forming a plurality of leads, a first semiconductor die mounted on the first surface of the leadframe and electrically connected to at least one of the plurality of leads, a second semiconductor die mounted on the second surface of the leadframe, wire bonds electrically connecting the second semiconductor die to the leadframe, and mold compound at least partially covering the first semiconductor die, the second semiconductor die and the wire bonds.
Package with dies mounted on opposing surfaces of a leadframe
A package includes a leadframe having first surface and a second surface opposing the first surface, the leadframe forming a plurality of leads, a first semiconductor die mounted on the first surface of the leadframe and electrically connected to at least one of the plurality of leads, a second semiconductor die mounted on the second surface of the leadframe, wire bonds electrically connecting the second semiconductor die to the leadframe, and mold compound at least partially covering the first semiconductor die, the second semiconductor die and the wire bonds.
PULSED LEVEL SHIFT AND INVERTER CIRCUITS FOR GAN DEVICES
GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MODULE
A semiconductor device includes a semiconductor IC, a capacitor element, a support portion, a first conductor and second conductor, and a sealing body. The semiconductor IC has a first IC terminal and a second IC terminal. The capacitor element has a first terminal and a second terminal. The support portion supports the capacitor element and the semiconductor IC. The first conductor and second conductor extend so as to connect the first terminal and second terminal with, respectively, the first IC terminal and second IC terminal. The sealing body encloses the capacitor element, the semiconductor IC, the first conductor, the second conductor and the support portion. The first IC terminal and second IC terminal, the first terminal and second terminal, the first conductor and the second conductor are disposed at the inner side relative to an outer edge of the support portion.
SEMICONDUCTOR DEVICE
A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor including a first electrode, a second electrode, and a first control electrode, a normally-on transistor including a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first diode including a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a Zener diode including a second anode electrically connected to the first electrode and a second cathode electrically connected to the second electrode; a first terminal provided on the semiconductor package, the first terminal being electrically connected to the first electrode; a plurality of second terminals provided on the semiconductor package, the second terminals being electrically connected to the first electrode, and the second terminals being lined up in a first direction; a third terminal provided on the semiconductor package, the third terminal being electrically connected to the fourth electrode; a plurality of fourth terminals provided on the semiconductor package, the fourth terminals being electrically connected to the first control electrode; and a plurality of fifth terminals provided on the semiconductor package, the fifth terminals being electrically connected to the second control electrode, and the fifth terminals being lined up in the first direction.
SWITCHING POWER DEVICE AND PARALLEL CONNECTION STRUCTURE THEREOF
A switching power device comprises a device lead-frame. Gates, Kelvin sources and a drain are formed on the device lead-frame, the gates and the Kelvin sources are arranged at one end of the device lead-frame, and the drain is arranged at the other end of the device lead-frame; and two gates and two Kelvin sources are provided. One end of the device lead-frame is sequentially provided with the gate, the Kelvin source, the Kelvin source and the gate, so as to form a symmetrical pin structure.
DYNAMICALLY CONFIGURABLE TRANSMITTER POWER LEVELS
In many examples, a device comprises a transmitter. The transmitter comprises a power amplifier, a first transformer coil coupled to the power amplifier, and a second transformer coil adapted to be electromagnetically coupled to the first transformer coil. The transmitter also comprises a first bond wire coupled to a first end of the second transformer coil and adapted to be coupled to a first end of an antenna, a capacitor coupled to a second end of the second transformer coil, a switch coupled to the capacitor and configured to engage and disengage the capacitor from the transmitter, and a second bond wire coupled to the switch and adapted to be coupled to a second end of the antenna.
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes a semiconductor module, a substrate, and a filler. The semiconductor module includes a semiconductor chip, a control integrated circuit (IC) configured to control driving of the semiconductor chip, and a package sealing the semiconductor chip and the control IC with an insulation material. On the substrate, the semiconductor module is mounted. The filler is provided between a lower surface of the package of the semiconductor module and the substrate. The substrate includes a through hole being provided at a position below the package and closer to the control IC than to the semiconductor chip in the package.