Methods of and apparatuses for processing substrates having carbon-containing material using atomic layer etch and selective deposition are provided. Methods involve exposing a carbon-containing material on a substrate to an oxidant and igniting a first plasma to modify a surface of the substrate and exposing the modified surface to a second plasma at a bias power to remove the modified surface. Methods also involve selectively depositing a second carbon-containing material onto the substrate using a precursor having a chemical formula of C.sub.xH.sub.y, where x and y are integers greater than or equal to 1. ALE and selective deposition may be performed without breaking vacuum.

Semiconductor devices and methods are provided to fabricate fin field-effect transistor (FinFET) devices having uniform fin height profiles. For example, uniformity of fin height profiles for FinFET devices is obtained by implementing a gate oxide removal process which is designed to prevent etching of an isolation layer (e.g., a shallow trench isolation layer) formed of an oxide material during removal of, e.g., sacrificial gate oxide layers of dummy gate structures during a replacement metal gate process.

The present disclosure relates to the field of semiconductor device etching process, and specifically discloses an etching method and a semiconductor device. The etching method comprises: providing a substrate on which a film layer to be etched is formed; forming a mask layer structure on the film layer to be etched, wherein the mask layer structure includes a dielectric layer formed on an upper surface of the film layer to be etched and an APF layer formed on an upper surface of the dielectric layer; patterning the APF layer; performing a first etching process on the dielectric layer and the film layer to be etched by using the patterned APF layer as a mask to pattern the dielectric layer and partially etch the film layer to be etched; removing the patterned APF layer.

Semiconductor devices and methods are provided to fabricate fin field-effect transistor (FinFET) devices having uniform fin height profiles. For example, uniformity of fin height profiles for FinFET devices is obtained by implementing a gate oxide removal process which is designed to prevent etching of an isolation layer (e.g., a shallow trench isolation layer) formed of an oxide material during removal of, e.g., sacrificial gate oxide layers of dummy gate structures during a replacement metal gate process.

A semiconductor structure includes a substrate; first and second fins extending from the substrate and oriented lengthwise generally along a first direction; an isolation feature over the substrate and separating bottom portions of the first and the second fins; first and second epitaxial semiconductor features over the first and the second fins, respectively; and a first dielectric feature sandwiched between the first and the second epitaxial semiconductor features. A maximum width of the first dielectric feature is smaller than a width of the isolation feature between the first and the second fins along a second direction perpendicular to the first direction.

The present application provides a block copolymer and uses thereof. The block copolymer of the present application exhibits an excellent self-assembling property or phase separation property, can be provided with a variety of required functions without constraint and, especially, etching selectivity can be secured, making the block copolymer effectively applicable to such uses as pattern formation.

There is provided an etching method including: a step of disposing a substrate in a chamber, the substrate having a silicon nitride film, a silicon oxide film, a silicon, and a silicon germanium; a step of setting a pressure in the chamber to 1,333 Pa or more; and a step of selectively etching the silicon nitride film with respect to the silicon oxide film, the silicon, and the silicon germanium by supplying a hydrogen fluoride gas into the chamber.

The present disclosure relates to a method for creating an optical component having a spatially controlled refractive index. The method may involve applying a thin metal material layer to a substrate. The thin metal material layer may then be heated to create a mask having a spatially varying nano-particle distribution. The substrate may then be etched, using the mask, to imprint a spatially patterned nanostructure pattern on a surface the substrate.

A method of forming semiconductor devices includes providing a substrate with a patterned material layer formed thereon, forming a material layer on the patterned material layer, wherein the material layer has a first region with a lower top surface and a second region with a higher top surface, forming a flowable material layer on the material layer, wherein the flowable material layer exposes at least a portion of the second region of the material layer, removing the exposed portion of the second region of the material layer with the flowable material layer as a stop layer, removing the flowable material layer, and planarizing the material layer.

A method for manufacturing a semiconductor-device in which a semiconductor-substrate is provided, including a SOI-wafer having a carrier-layer (CL) defining a rear-side, a functional-layer (FL), an insulation-layer (IL) situated between the CL and FL, and a passivation-layer (PL) applied to the FL and defining a front-side. The FL includes a functional-area having functional-structures. The front-side of the semiconductor-substrate is masked, a first-mask opening being configured, which defines an interior-area containing the functional-area, and the PL and FL are removed by etching the front-side of the semiconductor-substrate. The rear-side of the semiconductor-substrate is masked, a second-mask opening being configured, and a circumferential-edge of the second-mask opening being spaced outwardly relative to an outer-circumferential-edge of the interior-area. The CL and the IL are removed at least in the area of the second-mask opening by etching the rear-side of the semiconductor-substrate to expose the interior-area. A semiconductor-device is also described.