The present application relates to a block copolymer and uses thereof. The present application can provide a block copolymer—which exhibits an excellent self-assembling property and thus can be used effectively in a variety of applications—and uses thereof.

There is disclosed a substrate processing method for etching a substrate on which a first and a second silicon oxide layer having different film qualities are formed side by side. The substrate processing method includes: a first etching step of supplying a halogen-containing gas that is not activated to the substrate and sublimating reaction by-products generated by reaction between the halogen-containing gas and the first and the second silicon oxide layer; and a second etching step of etching the substrate by radicals generated by activating the halogen-containing gas.

Scalable device designs for FINFET technology are provided. In one aspect, a method of forming a FINFET device includes: patterning fins in a substrate which include a first fin(s) corresponding to a first FINFET device and a second fin(s) corresponding to a second FINFET device; depositing a conformal gate dielectric over the fins; depositing a conformal sacrificial layer over the gate dielectric; depositing a sacrificial gate material over the sacrificial layer; replacing the sacrificial layer with a first workfunction-setting metal(s) over the first fin(s) and a second workfunction-setting metal(s) over the second fin(s); removing the sacrificial gate material; forming dielectric gates over the first workfunction-setting metal(s), the second workfunction-setting metal(s) and the gate dielectric forming gate stacks; and forming source and drains in the fins between the gate stacks, wherein the source and drains are separated from the gate stacks by inner spacers. A FINFET device is also provided.

The present application provides a block copolymer and uses thereof. The block copolymer of the present application exhibits an excellent self-assembling property or phase separation property, can be provided with a variety of required functions without constraint and, especially, etching selectivity can be secured, making the block copolymer effectively applicable to such uses as pattern formation.

The present application provides a block copolymer and uses thereof. The block copolymer of the present application exhibits an excellent self-assembling property or phase separation property, can be provided with a variety of required functions without constraint and, especially, etching selectivity can be secured, making the block copolymer effectively applicable to such uses as pattern formation.

The present application provides a block copolymer and uses thereof. The block copolymer of the present application exhibits an excellent self-assembling property or phase separation property, and can be provided with a variety of required functions without constraint.

The present application relates to a monomer, a method for preparing a block copolymer, a block copolymer, and uses thereof. Each monomer of the present application exhibits an excellent self-assembling property and is capable of forming a block copolymer to which a variety of required functions are granted as necessary without constraint.

An organic film composition including a compound represented by the following general formula (1), ##STR00001## wherein n1 and n2 each independently represent 0 or 1; “W” represents a single bond or any of structures represented by the following formula (2); R.sub.1 represents any of structures represented by the following general formula (3); m1 and m2 each independently represent an integer of 0 to 7, with the proviso that m1+m2 is 1 to 14. ##STR00002##
There can be provided an organic film composition for forming an organic film having dry etching resistance as well as advanced filling/planarizing characteristics.

Structures that include an identification marking and fabrication methods for such structures. A chip is formed within a usable area of a wafer, and a marking region is formed on the wafer. The marking region is comprised of a conductor used to form a last metal layer of an interconnect structure for the chip. The identification marking is formed in the conductor of the marking region. After the identification marking is formed, a dielectric layer is deposited on the marking region. The dielectric layer on the marking region is planarized.

A semiconductor device includes etch stop films formed on the first gate electrode, the first source region, the first drain region, and the shallow trench isolation regions, respectively. First interlayer insulating films are formed on the etch stop film, respectively. Deep trenches are formed in the substrate between adjacent ones of the first interlayer insulating films to overlap the shallow trench isolation regions. Sidewall insulating films are formed in the deep trenches, respectively. A gap-fill insulating film is formed on the sidewall insulating film. A second interlayer insulating film is formed on the gap-fill insulating film. A top surface of the second interlayer insulating film is substantially planar and a bottom surface of the second interlayer insulating film is undulating.