A method of forming a semiconductor device includes: forming a gate structure over a fin that protrudes above a substrate; forming source/drain regions over the fin on opposing sides of the gate structure; forming a recess between gate spacers of the gate structure by recessing the gate structure below upper surfaces of the gate spacers; depositing a first layer of a dielectric material in the recess along sidewalls and a bottom of the recess; after depositing the first layer, performing a first etching process to remove portions of the first layer of the dielectric material; and after the first etching process, depositing a second layer of the dielectric material in the recess over the first layer of the dielectric material.

A method for processing a semiconductor structure includes: a substrate is provided, which has feature parts, in which an aspect ratio of the feature parts is greater than a preset aspect ratio, a barrier layer is disposed on tops of the feature parts, a hydrophilic layer is disposed on side walls of the feature parts, and there are particulate impurities on a surface of the hydrophilic layer; at least one cleaning treatment to the substrate is performed, in which the cleaning treatment includes: initial water vapor is introduced to the side walls of the feature parts, and a cooling treatment is performed to liquefy the initial water vapor adhering to a surface of the hydrophilic layer into water which carries the particulate impurities and flows into grooves; and a heating treatment is performed to evaporate the water into water vapor which carries the particulate impurities and escapes.

A method for controlling a critical dimension of a mask layer is described. The method includes receiving a first primary parameter level, a second primary parameter level, a first secondary parameter level, a second secondary parameter level, and a third secondary parameter level. The method also includes generating a primary signal having the first primary parameter level, and transitioning the primary signal from the first primary parameter level to the second primary parameter level. The method further includes generating a secondary radio frequency (RF) signal having the first secondary parameter level, and transitioning the secondary RF signal from the first secondary parameter level to the second secondary parameter level. The method includes transitioning the secondary RF signal from the second secondary parameter level to the third secondary parameter level.

A technique improves etch selectivity. An etching includes (a) providing, in a chamber, a substrate including an underlying film and a silicon-containing film on the underlying film, (b) etching the silicon-containing film to form a recess with first plasma generated from a first process gas containing a hydrogen fluoride gas until before the underlying film is exposed at the recess or until the underlying film is partly exposed at the recess, and (c) further etching the silicon-containing film at the recess under a condition different from a condition of (b).

A semiconductor device structure and a method for forming a semiconductor device structure are provided. The semiconductor device structure includes a substrate and a conductive line over the substrate. The semiconductor device structure also includes a catalyst structure over the conductive line and a carbon-containing conductive via directly on the catalyst structure. The semiconductor device structure further includes a dielectric layer surrounding the carbon-containing conductive via.

A method of fabricating a semiconductor device comprises forming a mold layer on a substrate, forming a hardmask layer on the mold layer such that a portion of the mold layer is exposed, and using the hardmask layer to perform on the mold layer a cryogenic etching process. The cryogenic etching process includes supplying a chamber with a process gas including first and second process gases, and generating a plasma from the process gas. Radicals of the first process gas etch the exposed portion of the mold layer. Ammonium salt is produced based on the radicals etching the exposed portion of the mold layer. The second process gas includes an R—OH compound. The R is hydrogen, a C1 to C5 alkyl group, a C2 to C6 alkenyl group, a C2 to C6 alkynyl group, or a phenyl group. The second process gas reduces a production rate of the ammonium salt.

An embodiment method includes: forming fins extending from a semiconductor substrate; depositing an inter-layer dielectric (ILD) layer on the fins; forming masking layers on the ILD layer; forming a cut mask on the masking layers, the cut mask including a first dielectric material, the cut mask having first openings exposing the masking layers, each of the first openings surrounded on all sides by the first dielectric material; forming a line mask on the cut mask and in the first openings, the line mask having slot openings, the slot openings exposing portions of the cut mask and portions of the masking layers, the slot openings being strips extending perpendicular to the fins; patterning the masking layers by etching the portions of the masking layers exposed by the first openings and the slot openings; and etching contact openings in the ILD layer using the patterned masking layers as an etching mask.

A first gate and a second gate are formed on a substrate with a gap between the first and second gates. The first gate has a first sidewall. The second gate has a second sidewall directly facing the first sidewall. A first sidewall spacer is disposed on the first sidewall. A second sidewall spacer is disposed on the second sidewall. A contact etch stop layer is deposited on the first and second gates and on the first and second sidewall spacers. The contact etch stop layer is subjected to a tilt-angle plasma etching process to trim a corner portion of the contact etch stop layer. An inter-layer dielectric layer is then deposited on the contact etch stop layer and into the gap.

A semiconductor device includes a semiconductor substrate, a semiconductor fin extending from the semiconductor substrate, a gate structure extending across the semiconductor fin, and source/drain semiconductor layers on opposite sides of the gate structure. The source/drain semiconductor layers each have a first thickness over a top side of the semiconductor fin and a second thickness over a lateral side of the semiconductor fin. The first thickness and the second thickness have a difference smaller than about 20 percent of the first thickness.

A semiconductor device and a method of forming the same are provided. The method includes forming a sacrificial gate structure over an active region. A first spacer layer is formed along sidewalls and a top surface of the sacrificial gate structure. A first protection layer is formed over the first spacer layer. A second spacer layer is formed over the first protection layer. A third spacer layer is formed over the second spacer layer. The sacrificial gate structure is replaced with a replacement gate structure. The second spacer layer is removed to form an air gap between the first protection layer and the third spacer layer.