A system and method for removing both carbon-based contaminants and oxygen-based contaminants from a semiconductor substrate within a single process chamber is disclosed. The invention may comprise utilization of remote plasma units and multiple gas sources to perform the process within the single process chamber.

Methods for depositing oxide thin films, such as metal oxide, metal silicates, silicon oxycarbide (SiOC) and silicon oxycarbonitride (SiOCN) thin films, on a substrate in a reaction space are provided. The methods can include at least one plasma enhanced atomic layer deposition (PEALD) cycle including alternately and sequentially contacting the substrate with a first reactant that comprises oxygen and a component of the oxide, and a second reactant comprising reactive species that does not include oxygen species. In some embodiments the plasma power used to generate the reactive species can be selected from a range to achieve a desired step coverage or wet etch rate ratio (WERR) for films deposited on three dimensional features. In some embodiments oxide thin films are selectively deposited on a first surface of a substrate relative to a second surface, such as on a dielectric surface relative to a metal or metallic surface.

There is formed, on a stack formed by alternately stacking an oxide film and a nitride film or an oxide film and a polysilicon film on a substrate, a hard mask in which two or more kinds of lines made of mutually different materials are arranged in order. Then, a photoresist is applied onto the hard mask. Furthermore, the photoresist is trimmed until one line is exposed from the end of the hard mask. Moreover, one line of the hard mask exposed beneath the photoresist is etched. Furthermore, a part of the stack exposed beneath the hard mask is etched. The etching of the photoresist, the hard mask, and the stack is repeated while changing etching conditions.

A method includes providing a structure having first and second fins over a substrate and oriented lengthwise generally along a first direction and source/drain (S/D) features over the first and second fins; forming an interlayer dielectric (ILD) layer covering the S/D features; performing a first etching process at least to an area between the S/D features, thereby forming a trench in the ILD layer; depositing a dielectric material in the trench; performing a second etching process to selectively recess the dielectric material; and performing a third etching process to selectively recess the ILD layer, thereby forming a contact hole that exposes the S/D features.

A substrate processing method performed in a chamber of a substrate processing apparatus is provided. The chamber includes a substrate support, an upper electrode, and a gas supply port. The substrate processing method includes (a) providing the substrate on the substrate support; (b) supplying a first processing gas into the chamber; (c) continuously supplying an RF signal into the chamber while continuously supplying a negative DC voltage to the upper electrode, to generate plasma from the first processing gas in the chamber; and (d) supplying a pulsed RF signal while continuously supplying the negative DC voltage to the upper electrode, to generate plasma from the first processing gas in the chamber. The process further includes repeating alternately repeating the steps (c) and (d), and a time for performing the step (c) once is 30 second or shorter.

Method of manufacturing a semiconductor device, includes forming a protective layer over substrate having a plurality of protrusions and recesses. The protective layer includes polymer composition including polymer having repeating units of one or more of:

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Wherein a, b, c, d, e, f, g, h, and i are each independently H, —OH, —ROH, —R(OH).sub.2, —NH.sub.2, —NHR, —NR.sub.2, —SH, —RSH, or —R(SH).sub.2, wherein at least one of a, b, c, d, e, f, g, h, and i on each repeating unit is not H. R, R.sub.1, and R.sub.2 are each independently a C1-C10 alkyl group, a C3-C10 cycloalkyl group, a C1-C10 hydroxyalkyl group, a C2-C10 alkoxy group, a C2-C10 alkoxy alkyl group, a C2-C10 acetyl group, a C3-C10 acetylalkyl group, a C1-C10 carboxyl group, a C2-C10 alkyl carboxyl group, or a C4-C10 cycloalkyl carboxyl group, and n is 2-1000. A resist layer is formed over the protective layer, and the resist layer is patterned.

A technique for suppressing a metal component from remaining at a bottom of a mask pattern when the mask pattern is formed using a metal-containing resist film. A developable anti reflection film 103 is previously formed below a resist film 104. Further, after exposing and developing the wafer W, TMAH is supplied to the wafer W to remove a surface of the antireflection film 103 facing a bottom of the recess pattern 110 of the resist film 104. Therefore, the metal component 105 can be suppressed from remaining at the bottom of the recess pattern 110. Therefore, when the SiO.sub.2 film 102 is subsequently etched using the pattern of the resist film 104, the etching is not hindered, so that defects such as bridges can be suppressed.

Provided are a substrate processing apparatus and a substrate processing method capable of achieving uniform trimming throughout an entire surface of a substrate. The substrate processing apparatus includes a gas channel including a center gas inlet and an additional gas inlet spaced apart from the center gas inlet, and a shower plate including a plurality of holes connected to the center gas inlet and the additional gas inlet, wherein a gas flow channel is formed having a clearance defined by a lower surface of the gas channel and an upper surface of the shower plate, the lower surface and the upper surface being substantially parallel.

A semiconductor device manufacturing method of forming a trench and a via in a porous low dielectric constant film formed on a substrate as an interlayer insulating film, includes: embedding a polymer having a urea bond in pores of the porous low dielectric constant film by supplying a raw material for polymerization to the porous low dielectric constant film; forming the via by etching the porous low dielectric constant film; subsequently, embedding a protective filling material made of an organic substance in the via; subsequently, forming the trench by etching the porous low dielectric constant film; subsequently, removing the protective filling material; and after the forming a trench, removing the polymer from the pores of the porous low dielectric constant film by heating the substrate to depolymerize the polymer, wherein the embedding a polymer having a urea bond in pores is performed before the forming a trench.

A patterning method includes forming a multilayer photoresist stack on a substrate. The multilayer photoresist stack includes a first layer of a wet photoresist, deposited by spin-on deposition, over a second layer of a dry photoresist, deposited by vapor deposition. The multilayer photoresist stack is exposed to a first pattern of actinic radiation including relative, spatially-varying doses of actinic radiation and including high-dose regions, mid-dose regions and low-dose regions. The multilayer photoresist stack and the first pattern of actinic radiation are configured such that after the exposing the multilayer photoresist stack to the first pattern of actinic radiation, in the high-dose regions, developability of both the first layer and the second layer is changed; in the mid-dose regions, developability of the first layer is changed while developability of the second layer is unchanged; in the low-dose regions, developability of both the first layer and the second layer is unchanged.