A semiconductor device having a gate structure and a method of forming same are provided. The semiconductor device includes a substrate and a gate structure over the substrate. The substrate has a first region and a second region. The gate structure extends across an interface between the first region and the second region. The gate structure includes a first gate dielectric layer over the first region, a second gate dielectric layer over the second region, a first work function layer over the first gate dielectric layer, a barrier layer along a sidewall of the first work function layer and above the interface between the first region and the second region, and a second work function layer over the first work function layer, the barrier layer and the second gate dielectric layer. The second work function layer is in physical contact with a top surface of the first work function layer.

A method for manufacturing a mold or an optical element provided with a fine surface roughness for anti-reflection or for diffusing, may include placing a substrate or a film made of a semiconductor or a metal into a reacting etching apparatus, introducing a mixed gas of sulfur hexafluoride and oxygen into the etching apparatus with the substrate or the film, tuning the mixed gas into plasma such that oxides are made to be scattered on a surface of the substrate or the film, and etching the surface of the substrate of the film by the sulfur hexafluoride while the oxides function as an etching mask to form the fine surface roughness on the surface of the substrate or the film. Further, etching conditions may be determined such that the pitch of the fine surface roughness is made from 3 to 18 micrometers.

This method includes steps a) providing the first structure and second structure, the first structure including a surface on which a silicon layer is formed; b) bombarding the silicon layer by a beam (F) of species configured to reach the surface of the first structure, and to preserve a part of the silicon layer with a surface roughness of less than 1 nm RMS on completion of the bombardment; c) bonding the first structure and second structure by direct bonding between the part of the silicon layer preserved in step b) and the second structure, steps b) and c) being executed in the same chamber subjected to a vacuum of less than 10.sup.?2 mbar.

As means for preventing a leakage of a fuse element cut by laser trimming due to a conductive residue or the like, an insulating film which has a high thermal conductivity and a relatively low adhesion is formed between an element isolation region and the fuse element in the case of forming the fuse element on the element isolation region in a groove on a main surface of an epitaxial substrate. When the fuse element is cut by performing the laser trimming, both of a part of the fuse element and the insulating film below the part of the fuse element are removed.

A semiconductor structure includes: a substrate; a gate structure located on the substrate, wherein the gate structure comprises a first conductive layer, a barrier layer and a second conductive layer which are stacked in sequence; wherein the first conductive layer includes a first polysilicon layer, a first metal layer and a second polysilicon layer, wherein the first polysilicon layer is adjacent to the substrate and the second polysilicon layer is contiguous to the barrier layer; and wherein the first metal layer is located between the first polysilicon layer and the second polysilicon layer. The gate structure of the embodiments of the application has a straight profile and an excellent electrical performance.

A method for processing a polysilicon thin film and a method for fabricating a thin film transistor are provided. The method for processing a polysilicon thin film includes: etching the polysilicon thin film using etching particles. An angle between an incident direction of the etching particles and the polysilicon thin film is larger than 0 and less than 90.

This method includes steps a) providing the first structure and second structure, the first structure including a surface on which a silicon layer is formed; b) bombarding the silicon layer by a beam (F) of species configured to reach the surface of the first structure, and to preserve a part of the silicon layer with a surface roughness of less than 1 nm RMS on completion of the bombardment; c) bonding the first structure and second structure by direct bonding between the part of the silicon layer preserved in step b) and the second structure, steps b) and c) being executed in the same chamber subjected to a vacuum of less than 10.sup.2 mbar.

According to the present invention, a dry-etching method for performing plasma etching in a vertical profile while maintaining selectivity relative to a mask, includes: a first process of etching a film to be etched with use of reactive gas to cause an etching profile of the film to be etched to be formed in a footing profile; and a second process of, after the first process, causing the footing profile to be formed in a vertical profile by means of sputtering etching.

As means for preventing a leakage of a fuse element cut by laser trimming due to a conductive residue or the like, an insulating film which has a high thermal conductivity and a relatively low adhesion is formed between an element isolation region and the fuse element in the case of forming the fuse element on the element isolation region in a groove on a main surface of an epitaxial substrate. When the fuse element is cut by performing the laser trimming, both of a part of the fuse element and the insulating film below the part of the fuse element are removed.