A semiconductor package includes a semiconductor chip including a connection pad disposed on an active surface of the semiconductor chip, a passivation layer disposed on the connection pad and the active surface and having an opening exposing at least a portion of the connection pad, and a capping pad covering the connection pad exposed to the opening; an encapsulant covering at least a portion of the semiconductor chip; and a connection structure disposed on the active surface of the semiconductor chip and including a connection via connected to the capping pad and a redistribution layer connected to the connection via, wherein the capping pad includes: a central portion disposed in the opening, and a peripheral portion extending from the central portion onto the passivation layer, and having a crystal grain having a size different from that of the crystal grain of the central portion.

A high frequency module capable of improving a heat dissipation performance of a power amplifier includes a mounting board, a power amplifier, and a connection member. The mounting board has a first main surface facing a second main surface. The power amplifier is disposed on the second main surface of the mounting board. The connection member is connectable to an external board. The power amplifier includes a base material, a transistor, and a through via. The base material has a third main surface facing a fourth main surface, and the third main surface is disposed between the second main surface and the fourth main surface. The transistor is disposed on the third main surface of the base material. The through via is provided between the third main surface and the fourth main surface. The through via is connected to the connection member.

A high frequency module capable of improving heat dissipation characteristics of a power amplifier and suppressing influence of heat of the power amplifier on another electronic component is provided. A high frequency module includes a mounting substrate, a power amplifier, a switch, a plurality of external connection terminals, and a connector. The mounting substrate has a first main surface and a second main surface that are opposite to each other. The power amplifier and the switch are disposed on the second main surface of the mounting substrate. The plurality of external connection terminals are disposed on the second main surface of the mounting substrate. The connector is able to be connected to an external substrate. The plurality of external connection terminals include a first external connection terminal that is connected to the connector. The first external connection terminal is disposed between the power amplifier and the switch.

An apparatus includes a transfer mechanism to transfer an electrically-actuatable element directly from a wafer tape to a transfer location on a circuit trace on a product substrate. The transfer mechanism includes one or more transfer wires. Two or more stabilizers disposed on either side of the one or more transfer wires. A needle actuator is connected to the one or more transfer wires and the two or more stabilizers to move the one or more transfer wires and the two or more stabilizers to a die transfer position.

An offset interposer includes a land side including land-side ball-grid array (BGA) and a package-on-package (POP) side including a POP-side BGA. The land-side BGA includes two adjacent, spaced-apart land-side pads, and the POP-side BGA includes two adjacent, spaced-apart POP-side pads that are coupled to the respective two land-side BGA pads through the offset interposer. The land-side BGA is configured to interface with a first-level interconnect. The POP-side BGA is configured to interface with a POP substrate. Each of the two land-side pads has a different footprint than the respective two POP-side pads.

The present disclosure relates to a method of manufacturing a first electronic circuit including a planar surface, intended to be affixed to a second electronic circuit by a self-assembly method with a hybrid molecular bonding, and first electrically-conductive pads exposed on the surface. The method includes the forming of a peripheral area around the surface including second exposed and raised pads, each at least partly having the same composition as the first pads.

A method for electrically coupling a pad and a front face of a pillar, including shaping the front face pillar, the front face having at least partially a convex surface, applying a suspension to the front face or to the pad, wherein the suspension includes a carrier fluid, electrically conducting microparticles and electrically conducting nanoparticles, arranging the front face of the pillar opposite to the pad at a distance such that the carrier fluid bridges at least partially a gap between the front face of the pillar and the pad, evaporating the carrier fluid thereby confining the microparticles and the nanoparticles, and thereby arranging the nanoparticles and the microparticles as percolation paths between the front face of the pillar and the pad, and sintering the arranged nanoparticles for forming metallic bonds at least between the nanoparticles and/or between the nanoparticles and the front face of the pillar or the pad.

A method of selectively transferring micro devices from a donor substrate to contact pads on a receiver substrate. Micro devices being attached to a donor substrate with a donor force. The donor substrate and receiver substrate are aligned and brought together so that selected micro devices meet corresponding contact pads. A receiver force is generated to hold selected micro devices to the contact pads on the receiver substrate. The donor force is weakened and the substrates are moved apart leaving selected micro devices on the receiver substrate. Several methods of generating the receiver force are disclosed, including adhesive, mechanical and electrostatic techniques.

A method of manufacturing an electronic device, including: a) forming a plurality of chips, each including a plurality of connection areas and at least one first pad; b) forming a transfer substrate including, for each chip, a plurality of connection areas and at least one second pad, one of the first and second pads being a permanent magnet and the other one of the first and second pads being either a permanent magnet or made of a ferromagnetic material; and c) affixing the chips to the transfer substrate to connect the connection areas of the chips to the connection areas of the transfer substrate, by using the magnetic force between the pads to align the connection areas of the chips with the corresponding connection areas of the transfer substrate.

A semiconductor device comprising: substrate having main surface facing thickness direction; wirings arranged on main surface; semiconductor element having back surface facing the main surface and electrodes formed on back surface, wherein the electrodes are bonded to the wirings; and columnar wirings located outside the semiconductor element as viewed along the thickness direction, protrude in direction away from the main surface in the thickness direction, and are arranged on the wirings, wherein the semiconductor element includes first circuit and second circuit, wherein the electrodes include first electrodes electrically connected to the first circuit and second electrodes electrically connected to the second circuit, wherein the columnar wirings include first columnar portions electrically connected to the first electrodes and second columnar portions electrically connected to the second electrodes, and wherein area of each first columnar portions is larger than area of each second columnar portions in the thickness direction.