The present invention has: a heater; and a bonding tool having a lower surface on which a memory chip is adsorbed; and an upper surface attached to the heater, and is provided with a bonding tool which presses the peripheral edge of the memory chip to a solder ball in a first peripheral area of the lower surface and which presses the center of the memory chip (60) to a DAF having a heat resistance temperature lower than that of the solder ball in a first center area. The amount of heat transmitted from the first center area to the center of the memory chip is smaller than that transmitted from the first peripheral area (A) to the peripheral edge of the memory chip. Thus, the bonding apparatus in which the center of a bonding member can be heated to a temperature lower than that at the peripheral edge can be provided.

A semiconductor device includes a first electronic component, a second electronic component, a third electronic component, a plurality of first interconnection structures, and a plurality of second interconnection structures. The second electronic component is between the first electronic component and the third electronic component. The first interconnection structures are between and electrically connected to the first electronic component and the second electronic component. Each of the first interconnection structures has a length along a first direction substantially parallel to a surface of the first electronic component and a width along a second direction substantially parallel to the surface and substantially perpendicular to the first direction. The length is larger than the width. The second interconnection structures are between and electrically connected to the second electronic component and the third electronic component.

A semiconductor device includes a first electronic component, a second electronic component, a third electronic component, a plurality of first interconnection structures, and a plurality of second interconnection structures. The second electronic component is between the first electronic component and the third electronic component. The first interconnection structures are between and electrically connected to the first electronic component and the second electronic component. Each of the first interconnection structures has a length along a first direction substantially parallel to a surface of the first electronic component and a width along a second direction substantially parallel to the surface and substantially perpendicular to the first direction. The length is larger than the width. The second interconnection structures are between and electrically connected to the second electronic component and the third electronic component.

The present disclosure relates to an electronic device comprising a wafer comprising a first upper surface having at least one first contact arranged thereon; and at least one die comprising a second upper surface having at least one second contact arranged thereon, and at least one first lateral surface orthogonal to the second upper surface, said first contact being coupled to said second contact by a connector comprising one first conductive pillar formed on said first contact of said wafer; one second conductive pillar formed on said second contact of said die; and at least one conductive ball positioned in contact with at least a first upper portion of said first pillar(s) and in contact with at least one second upper portion of said second pillar(s).

The present disclosure relates to an electronic device comprising a wafer comprising a first upper surface having at least one first contact arranged thereon; and at least one die comprising a second upper surface having at least one second contact arranged thereon, and at least one first lateral surface orthogonal to the second upper surface, said first contact being coupled to said second contact by a connector comprising one first conductive pillar formed on said first contact of said wafer; one second conductive pillar formed on said second contact of said die; and at least one conductive ball positioned in contact with at least a first upper portion of said first pillar(s) and in contact with at least one second upper portion of said second pillar(s).

A package comprising a substrate and an integrated device coupled to the substrate through a plurality of pillar interconnects and a plurality of solder interconnects. The plurality of pillar interconnects includes a first pillar interconnect comprising a first cavity. The plurality of solder interconnects comprises a first solder interconnect located in the first cavity of the first pillar interconnect. A planar cross section that extends through the first cavity of the first pillar interconnect may comprise an O shape. The first pillar interconnect comprises a first pillar interconnect portion comprising a first width; and a second pillar interconnect portion comprising a second width that is different than the first width.

A package comprising a substrate and an integrated device coupled to the substrate through a plurality of pillar interconnects and a plurality of solder interconnects. The plurality of pillar interconnects includes a first pillar interconnect comprising a first cavity. The plurality of solder interconnects comprises a first solder interconnect located in the first cavity of the first pillar interconnect. A planar cross section that extends through the first cavity of the first pillar interconnect may comprise an O shape. The first pillar interconnect comprises a first pillar interconnect portion comprising a first width; and a second pillar interconnect portion comprising a second width that is different than the first width.

A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.

A solder member mounting method includes providing a substrate having bonding pads formed thereon, detecting a pattern interval of the bonding pads, selecting one of solder member attachers having different pattern intervals from each other, such that the one selected solder member attacher of the solder member attachers has a pattern interval corresponding to the detected pattern interval of the bonding pads, and attaching solder members on the bonding pads of the substrate, respectively, using the one selected solder member attacher.

An SIP module includes a plurality of electrical components mounted to an interconnect substrate. The electrical components and interconnect substrate are covered by an encapsulant. A conductive post is formed through the encapsulant. A plurality of openings is formed in the encapsulant by laser in a form of a circuit pattern. A conductive material is deposited over a surface of the encapsulant and into the openings to form an electrical circuit pattern. A portion of the conductive material is removed by a grinder to expose the electrical circuit pattern. The grinding operation planarizes the surface of the encapsulant and the electrical circuit pattern. The electrical circuit pattern can be a trace, contact pad, RDL, or other interconnect structure. The electrical circuit pattern can also be a shielding layer or antenna. An electrical component is disposed over the SIP module and electrical circuit pattern.