A semiconductor device includes: a metal sheet; an insulating pattern provided on the metal sheet; a power circuit pattern and a signal circuit pattern that are provided on the insulating pattern; a power semiconductor chip mounted on the power circuit pattern; and a control semiconductor chip that is mounted on the signal circuit pattern and controls the power semiconductor chip. The power semiconductor chip is bonded to the power circuit pattern with a first die bonding material comprised of copper, and the control semiconductor chip is bonded to the signal circuit pattern with a second die bonding material.

A semiconductor device includes: a metal sheet; an insulating pattern provided on the metal sheet; a power circuit pattern and a signal circuit pattern that are provided on the insulating pattern; a power semiconductor chip mounted on the power circuit pattern; and a control semiconductor chip that is mounted on the signal circuit pattern and controls the power semiconductor chip. The power semiconductor chip is bonded to the power circuit pattern with a first die bonding material comprised of copper, and the control semiconductor chip is bonded to the signal circuit pattern with a second die bonding material.

A method of using a solder reflow oven can include disposing at least one substrate including solder in a chamber of the oven. The method can include decreasing a pressure of the chamber to a first pressure between about 0.1-50 Torr. After decreasing the pressure of the chamber, the temperature of the at least one substrate can be increased to a first temperature. Formic acid vapor can be admitted into the chamber above the at least one substrate while nitrogen is discharged into the chamber below the at least one substrate. The method can also include removing at least a portion of the formic acid vapor from the enclosure. After the removing step, the temperature of the at least one substrate can be further increased to a second temperature higher than the first temperature. The at least one substrate can be maintained at the second temperature for a first time. And then, the at least one substrate can be cooled.

A method of using a solder reflow oven can include disposing at least one substrate including solder in a chamber of the oven. The method can include decreasing a pressure of the chamber to a first pressure between about 0.1-50 Torr. After decreasing the pressure of the chamber, the temperature of the at least one substrate can be increased to a first temperature. Formic acid vapor can be admitted into the chamber above the at least one substrate while nitrogen is discharged into the chamber below the at least one substrate. The method can also include removing at least a portion of the formic acid vapor from the enclosure. After the removing step, the temperature of the at least one substrate can be further increased to a second temperature higher than the first temperature. The at least one substrate can be maintained at the second temperature for a first time. And then, the at least one substrate can be cooled.

Integrated circuit assemblies, electronic systems, and methods for fabricating the same are disclosed. An integrated circuit assembly is formed by thermally contacting at least two integrated circuit packages to opposite sides of a shared heat dissipation device. In one embodiment, the at least two integrated circuit packages are electrically attached to an electronic card to form an intermediate integrated circuit assembly. In a further embodiment, the integrated circuit assembly includes at least one intermediate integrated circuit assembly electrically attached to an electronic board.

Integrated circuit assemblies, electronic systems, and methods for fabricating the same are disclosed. An integrated circuit assembly is formed by thermally contacting at least two integrated circuit packages to opposite sides of a shared heat dissipation device. In one embodiment, the at least two integrated circuit packages are electrically attached to an electronic card to form an intermediate integrated circuit assembly. In a further embodiment, the integrated circuit assembly includes at least one intermediate integrated circuit assembly electrically attached to an electronic board.

Semiconductor devices having redistribution structures, and associated systems and methods, are disclosed herein. In some embodiments, a semiconductor assembly comprises a die stack including a plurality of semiconductor dies, and a routing substrate mounted on the die stack. The routing substrate includes an upper surface having a redistribution structure. The semiconductor assembly also includes a plurality of electrical connectors coupling the redistribution structure to at least some of the semiconductor dies. The semiconductor assembly further includes a controller die mounted on the routing substrate. The controller die includes an active surface that faces the upper surface of the routing substrate and is electrically coupled to the redistribution structure, such that the routing substrate and the semiconductor dies are electrically coupled to the controller die via the redistribution structure.

Semiconductor devices having redistribution structures, and associated systems and methods, are disclosed herein. In some embodiments, a semiconductor assembly comprises a die stack including a plurality of semiconductor dies, and a routing substrate mounted on the die stack. The routing substrate includes an upper surface having a redistribution structure. The semiconductor assembly also includes a plurality of electrical connectors coupling the redistribution structure to at least some of the semiconductor dies. The semiconductor assembly further includes a controller die mounted on the routing substrate. The controller die includes an active surface that faces the upper surface of the routing substrate and is electrically coupled to the redistribution structure, such that the routing substrate and the semiconductor dies are electrically coupled to the controller die via the redistribution structure.

An integrated circuit package may be formed comprising a substrate that includes a mold material layer and a signal routing layer, wherein the mold material layer comprises at least one bridge and at least one foam structure embedded in a mold material. In one embodiment, the substrate may include the mold material of the mold material layer filling at least a portion of cells within the foam structure. In a further embodiment, at least two integrated circuit devices may be attached to the substrate, such that the bridge provides device-to-device interconnection between the at least two integrated circuit devices. In a further embodiment, the integrated circuit package may be electrically attached to an electronic board.

An integrated circuit package may be formed comprising a substrate that includes a mold material layer and a signal routing layer, wherein the mold material layer comprises at least one bridge and at least one foam structure embedded in a mold material. In one embodiment, the substrate may include the mold material of the mold material layer filling at least a portion of cells within the foam structure. In a further embodiment, at least two integrated circuit devices may be attached to the substrate, such that the bridge provides device-to-device interconnection between the at least two integrated circuit devices. In a further embodiment, the integrated circuit package may be electrically attached to an electronic board.