A semiconductor device is disclosed. The semiconductor device includes a chip carrier having a first cavity and a second cavity. A semiconductor die is mounted in the first cavity. The semiconductor die includes a patterned top metallization layer having a first electrical contact pad. An insulating layer is arranged inside the second cavity. A first end of a first electrical conductor is arranged over the insulating layer and a second end of the first electrical conductor is arranged on the first electrical contact pad of the semiconductor die. An encapsulant encapsulates the semiconductor die, both ends of the first electrical conductor, and parts of the chip carrier. A method for manufacturing the semiconductor device is also disclosed.

An electronic device is disclosed. The electronic device includes a carrier including a first region and a second region distinct from the first region. The electronic device also includes an electronic component covering the first region and at least partially exposing the second region. The electronic device also includes a first power regulating element in the second region of the carrier and a second power regulating element. The second power regulating element is disposed adjacent to the first power regulating element and electrically connected to the electronic component through the first power regulating element to provide a first power path.