A light emitting device includes a semiconductor chip including a p-type semiconductor layer and an n-type semiconductor layer, the semiconductor chip being adapted to emit light between the p-type semiconductor layer and the n-type semiconductor layer; a p-side pad electrode disposed on an upper surface side of the semiconductor chip and over the p-type semiconductor layer; an n-side pad electrode disposed on an upper surface side of the semiconductor chip and over the n-type semiconductor layer; a resin layer disposed to cover the upper surface of the semiconductor chip; a p-side connection electrode and an n-side connection electrode disposed at an outer surface of the resin layer and positioned on the upper surface side of the semiconductor chip; and a metal wire disposed in the resin. The metal wire is adapted to make connection at least one of between the p-side pad electrode and the p-side connection electrode, and between the n-side pad electrode and the n-side connection electrode.

A light emitting device includes a semiconductor chip including a p-type semiconductor layer and an n-type semiconductor layer, the semiconductor chip being adapted to emit light between the p-type semiconductor layer and the n-type semiconductor layer; a p-side pad electrode disposed on an upper surface side of the semiconductor chip and over the p-type semiconductor layer; an n-side pad electrode disposed on an upper surface side of the semiconductor chip and over the n-type semiconductor layer; a resin layer disposed to cover the upper surface of the semiconductor chip; a p-side connection electrode and an n-side connection electrode disposed at an outer surface of the resin layer and positioned on the upper surface side of the semiconductor chip; and a metal wire disposed in the resin. The metal wire is adapted to make connection at least one of between the p-side pad electrode and the p-side connection electrode, and between the n-side pad electrode and the n-side connection electrode.

The assembly of a chip (101) attached to a substrate (103) with wires (201) spanning from the chip to the substrate is loaded in a heated cavity (402) of a mold; the wire surfaces are coated with an adsorbed layer of molecules of a heterocyclic compound (302); a pressure chamber (404) of the mold is loaded with a solid pellet (410) of a packaging material including a polymerizable resin, the chamber being connected to the cavity; the vapor of resin molecules is allowed to spread from the chamber to the assembly inside the cavity during the time interval needed to heat the solid pellet for rendering it semi-liquid and to pressurize it through runners (403) before filling the mold cavity, whereby the resin molecules arriving in the cavity are cross-linked by the adsorbed heterocyclic compound molecules into an electrically insulating at least one monolayer of polymeric structures on the wire surfaces.

The assembly of a chip (101) attached to a substrate (103) with wires (201) spanning from the chip to the substrate is loaded in a heated cavity (402) of a mold; the wire surfaces are coated with an adsorbed layer of molecules of a heterocyclic compound (302); a pressure chamber (404) of the mold is loaded with a solid pellet (410) of a packaging material including a polymerizable resin, the chamber being connected to the cavity; the vapor of resin molecules is allowed to spread from the chamber to the assembly inside the cavity during the time interval needed to heat the solid pellet for rendering it semi-liquid and to pressurize it through runners (403) before filling the mold cavity, whereby the resin molecules arriving in the cavity are cross-linked by the adsorbed heterocyclic compound molecules into an electrically insulating at least one monolayer of polymeric structures on the wire surfaces.

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.

A semiconductor device includes: a semiconductor chip; and an Ag fired cap formed so as to cover a source pad electrode formed on the semiconductor chip. The semiconductor chip is disposed on a first substrate electrode, and one end of a Cu wire is bonded onto the Ag fired cap by means of an ultrasonic wave. There is provided a semiconductor device capable of improving a power cycle capability, and a fabrication method of such a semiconductor device.

A semiconductor device includes first conductive films that are provided, above a semiconductor substrate, at least on both sides of a non-formation region in which the first conductive films are not provided; an interlayer dielectric film including a first portion that is provided on the non-formation region, second portions provided above the first conductive film on both sides of the non-formation region, and a step portion that connects the first portion and the second portions; a second conductive film provided above the interlayer dielectric film; through terminal portions that penetrate the second portions of the interlayer dielectric film; and a wire bonded with the second conductive film above the first portion, where the through terminal portions include one or more first through terminal portions and one or more second through terminal portions being provided at positions opposite to each other with a bonded portion of the wire being interposed therebetween.

Package-On-Package (PoP) structures including stud bulbs and methods of forming PoP structures are provided. A structure may include a first substrate, stud bulbs, a die, a second substrate, and electrical connectors. The stud bulbs are coupled to a first surface of the first substrate. The die is attached to the first surface of the first substrate. The electrical connectors are coupled to the second substrate, and respective ones of the electrical connectors are coupled to respective ones of the stud bulbs.

Package-On-Package (PoP) structures including stud bulbs and methods of forming PoP structures are provided. A structure may include a first substrate, stud bulbs, a die, a second substrate, and electrical connectors. The stud bulbs are coupled to a first surface of the first substrate. The die is attached to the first surface of the first substrate. The electrical connectors are coupled to the second substrate, and respective ones of the electrical connectors are coupled to respective ones of the stud bulbs.

An integrated circuit includes a metal seed layer contacting a metal element of a top interconnect layer, a plated copper pad over the seed layer, a plated metal cap layer on the top surface of the copper pad, an upper protective overcoat covering a lateral surface of the copper pad and overlapping a top surface of the cap layer with a bond pad opening exposing the cap layer, and a bond pad of electroless plated metal in the bond pad opening.