A method for manufacturing a semiconductor device includes preparing a semiconductor chip having a back surface made of a Cu layer. The semiconductor chip is bonded to a die pad having a front surface made of Cu via a bonding material containing a dissimilar metal not containing Cu and Pb and a Bi-based material so that the Cu layer and the bonding material come into contact with each other. After the bonding, the die pad is then heat-treated.

A method for manufacturing a semiconductor device includes preparing a semiconductor chip having a back surface made of a Cu layer. The semiconductor chip is bonded to a die pad having a front surface made of Cu via a bonding material containing a dissimilar metal not containing Cu and Pb and a Bi-based material so that the Cu layer and the bonding material come into contact with each other. After the bonding, the die pad is then heat-treated.

The invention provides a semiconductor structure. The semiconductor structure includes a substrate. A first passivation layer is disposed on the substrate. A conductive pad is disposed on the first passivation layer. A second passivation layer is disposed on the first passivation layer. A conductive structure is disposed on the conductive pad, and a passive device is also disposed on the conductive pad, wherein the passive device has a first portion located above the second passivation layer and a second portion passing through the second passivation layer. A solderability preservative film covers the first portion of the passive device, and an under bump metallurgy (UBM) layer covers the second portion of the passive device and a portion of the conductive structure.

The invention provides a semiconductor structure. The semiconductor structure includes a substrate. A first passivation layer is disposed on the substrate. A conductive pad is disposed on the first passivation layer. A second passivation layer is disposed on the first passivation layer. A conductive structure is disposed on the conductive pad, and a passive device is also disposed on the conductive pad, wherein the passive device has a first portion located above the second passivation layer and a second portion passing through the second passivation layer. A solderability preservative film covers the first portion of the passive device, and an under bump metallurgy (UBM) layer covers the second portion of the passive device and a portion of the conductive structure.

A semiconductor device including a die pad having a front surface made of Cu; a semiconductor chip disposed so as to be opposed to the front surface of the die pad; a bonding layer provided between the die pad and the semiconductor chip; and a plurality of leads disposed around the die pad, wherein the die pad and the plurality of leads make up a lead frame in cooperation with each other, a cavity is fabricated on the surface of the plurality of leads, and a projecting portion is fabricated next to the cavity.

A semiconductor device including a die pad having a front surface made of Cu; a semiconductor chip disposed so as to be opposed to the front surface of the die pad; a bonding layer provided between the die pad and the semiconductor chip; and a plurality of leads disposed around the die pad, wherein the die pad and the plurality of leads make up a lead frame in cooperation with each other, a cavity is fabricated on the surface of the plurality of leads, and a projecting portion is fabricated next to the cavity.

The semiconductor device of the present invention includes an insulating layer, a copper wiring for wire connection formed on the insulating layer, a shock absorbing layer formed on an upper surface of the copper wiring, the shock absorbing layer being made of a metallic material with a hardness higher than copper, a bonding layer formed on the shock absorbing layer, the bonding layer having a connection surface for a wire, and a side protecting layer covering a side surface of the copper wiring, wherein the side protecting layer has a thickness thinner than a distance from the upper surface of the copper wiring to the connection surface of the bonding layer.

The semiconductor device of the present invention includes an insulating layer, a copper wiring for wire connection formed on the insulating layer, a shock absorbing layer formed on an upper surface of the copper wiring, the shock absorbing layer being made of a metallic material with a hardness higher than copper, a bonding layer formed on the shock absorbing layer, the bonding layer having a connection surface for a wire, and a side protecting layer covering a side surface of the copper wiring, wherein the side protecting layer has a thickness thinner than a distance from the upper surface of the copper wiring to the connection surface of the bonding layer.

The invention provides a semiconductor structure. The semiconductor structure includes a substrate. A first passivation layer is disposed on the substrate. A conductive pad is disposed on the first passivation layer. A second passivation layer is disposed on the first passivation layer. A passive device is disposed on the conductive pad, passing through the second passivation layer. An organic solderability preservative film covers the passive device.

The invention provides a semiconductor structure. The semiconductor structure includes a substrate. A first passivation layer is disposed on the substrate. A conductive pad is disposed on the first passivation layer. A second passivation layer is disposed on the first passivation layer. A passive device is disposed on the conductive pad, passing through the second passivation layer. An organic solderability preservative film covers the passive device.