Methods open etch stop layers in an integrated environment along with metallization processes. In some embodiments, a method for opening an etch stop layer (ESL) prior to metallization may include etching the ESL with an anisotropic process using direct plasma to form helium ions that are configured to roughen the ESL for a first duration of approximately 10 seconds to approximately 30 seconds, forming aluminum fluoride on the ESL using remote plasma and nitrogen trifluoride gas for a second duration of approximately 10 seconds to approximately 30 seconds, and exposing the ESL to a gas mixture of boron trichloride, trimethylaluminum, and/or dimethylaluminum chloride at a temperature of approximately 100 degrees Celsius to approximately 350 degrees Celsius to remove aluminum fluoride from the ESL and a portion of a material of the ESL for a third duration of approximately 30 seconds to approximately 60 seconds.

Plasma-assisted methods and apparatus are disclosed. The methods and apparatus can be used to provide activated species formed in a remote plasma unit to a reaction chamber to assist ignition of a plasma within a reaction chamber coupled to the remote plasma unit.

A structure comprising a semiconductor substrate and a layer of PZT (lead zirconate titanate) is etched by performing a first plasma etch step with a first etch process gas mixture. The first etch process gas mixture comprises at least one fluorine containing species. The first plasma etch step is performed so that involatile metal etch products are deposited onto interior surfaces of the chamber. The structure is further etched by performing a second plasma etch step with a second etch process gas mixture. The second etch process gas mixture comprises at least one fluorocarbon species. The second plasma etch step is performed so that a fluorocarbon polymer layer is deposited onto interior surfaces of the chamber to overlay involatile metal etch products deposited in the first plasma etch step and to provide a substrate on which further involatile metal etch products can be deposited.

The present disclosure provides forming nanostructures utilizing multiple patterning process with good profile control and feature transfer integrity. In one embodiment, a method for forming features on a substrate includes forming a first mandrel layer on a material layer disposed on a substrate. A first spacer layer is conformally formed on sidewalls of the first mandrel layer, wherein the first spacer layer comprises a doped silicon material. The first mandrel layer is selectively removed while keeping the first spacer layer. A second spacer layer is conformally formed on sidewalls of the first spacer layer and selectively removing the first spacer layer while keeping the second spacer layer.

Exemplary semiconductor processing methods may include providing a carbon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region of the semiconductor processing chamber. The substrate may include a low dielectric constant material defining one or more features, a liner extending across the low dielectric constant material and within the one or more features, and a metal-containing layer deposited on the liner and extending within the one or more features. The methods may include forming a layer of material on at least a portion of the liner and the metal-containing layer. The layer of material may include graphene. The methods may include removing substantially all of the portion of the layer of material on the liner.

Provided is a method of high-density pattern forming, which includes: providing a substrate; forming a hard mask layer on the substrate; forming a sacrificial layer on the hard mask layer; forming photoresists arranged at intervals on the sacrificial layer; etching the sacrificial layer to enable the sacrificial layer to form a mandrel corresponding to the photoresist one by one, wherein a cross-sectional size of the mandrel gradually decreases from an end of the mandrel away from the hard mask layer to an end close to the hard mask layer; forming an isolation layer on the mandrel; removing the isolation layer on the top of the mandrel, the isolation layer covering the hard mask layer, and the mandrel to form an isolation sidewall pattern; and transferring the isolation sidewall pattern to the hard mask layer.

A semiconductor device includes first and second gate structures over a substrate, the first gate structure has a first width that is smaller than a second width of the second gate structure, in which a lower portion of the first gate structure having a first work-function material (WFM) layer, the first WFM layer having a top surface, a lower portion of the second gate structure having a second WFM layer, the second WFM layer having a top surface. A first gate electrode is disposed over the first WFM layer and a second gate electrode has a lower portion disposed in the second WFM layer, in which the first gate electrode has a first width that is smaller than a second width of the second gate electrode, and wherein the top surface of the second WFM layer is at a level below a top surface of the second gate electrode.

Tin oxide films are used to create air gaps during semiconductor substrate processing. Tin oxide films, disposed between exposed layers of other materials, such as SiO.sub.2 and SiN can be selectively etched using a plasma formed in an Hz-containing process gas. The etching creates a recessed feature in place of the tin oxide between the surrounding materials. A third material, such as SiO.sub.2 is deposited over the resulting recessed feature without fully filling the recessed feature, forming an air gap. A method for selectively etching tin oxide in a presence of SiO.sub.2, SiC, SiN, SiOC, SiNO, SiCNO, or SiCN, includes, in some embodiments, contacting the substrate with a plasma formed in a process gas comprising at least about 50% Hz. Etching of tin oxide can be performed without using an external bias at the substrate and is preferably performed at a temperature of less than about 100° C.

Disclosed are apparatuses and methods for performing atomic layer etching. A method may include modifying one or more surface layers of material on the substrate and exposing the one or more modified surface layers on the substrate to an electron source thereby removing, without using a plasma, the one or more modified surface layers on the substrate. An apparatus may include a processing chamber, a process gas unit, an electron source, and a controller with instructions configured to cause the process gas unit to flow a first process gas to a substrate in a chamber interior, the first process gas is configured to modify one or more layers of material on the substrate, and to cause the electron source to generate electrons and expose the one or more modified surface layers on the substrate to the electrons, the one or more modified surface layers being removed, without using a plasma.

An etching method includes (a) performing a plasma etching on an organic film, having a mask formed thereon, to form a recess in the organic film; (b) forming an organic protective film on a side wall surface of the recess in the organic film; and (c) performing an additional plasma etching on the organic film after (b).