Patent classifications
H01L2224/13211
Structures to enable a full intermetallic interconnect
A method forming an interconnect structure includes depositing a first solder bump on a chip; depositing a second solder bump on a laminate, the second solder bump including a nickel copper colloid surrounded by a nickel or copper shell and suspended in a tin-based solder; aligning the chip with the laminate; performing a first reflow process to join the chip to the laminate; depositing an underfill material around the first solder bump and the second solder bump; and performing a second reflow process at a temperature that is lower than the first reflow process to convert the first solder bump and the second solder bump to an all intermetallic interconnect; wherein depositing the underfill material is performed before or after performing the second reflow process.
Method for Producing Metal Ball, Joining Material, and Metal Ball
Produced is a metal ball which suppresses an emitted dose. Contained are the steps of melting a pure metal by heating the pure metal at a temperature which is higher than a boiling point of an impurity to be removed, higher than a melting point of the pure metal, and lower than a boiling point of the pure metal, the pure metal containing a U content of 5 ppb or less, a Th content of 5 ppb or less, purity of 99.9% or more and 99.995% or less, and a Pb or Bi content or a total content of Pb and Bi of 1 ppm or more, and the pure metal having the boiling point higher than the boiling point at atmospheric pressure of the impurity to be removed; and sphering the molten pure metal in a ball.
Method for Producing Metal Ball, Joining Material, and Metal Ball
Produced is a metal ball which suppresses an emitted dose. Contained are the steps of melting a pure metal by heating the pure metal at a temperature which is higher than a boiling point of an impurity to be removed, higher than a melting point of the pure metal, and lower than a boiling point of the pure metal, the pure metal containing a U content of 5 ppb or less, a Th content of 5 ppb or less, purity of 99.9% or more and 99.995% or less, and a Pb or Bi content or a total content of Pb and Bi of 1 ppm or more, and the pure metal having the boiling point higher than the boiling point at atmospheric pressure of the impurity to be removed; and sphering the molten pure metal in a ball.
STRUCTURES TO ENABLE A FULL INTERMETALLIC INTERCONNECT
A method forming an interconnect structure includes depositing a first solder bump on a chip; depositing a second solder bump on a laminate, the second solder bump including a nickel copper colloid surrounded by a nickel or copper shell and suspended in a tin-based solder; aligning the chip with the laminate; performing a first reflow process to join the chip to the laminate; depositing an underfill material around the first solder bump and the second solder bump; and performing a second reflow process at a temperature that is lower than the first reflow process to convert the first solder bump and the second solder bump to an all intermetallic interconnect; wherein depositing the underfill material is performed before or after performing the second reflow process.
STRUCTURES TO ENABLE A FULL INTERMETALLIC INTERCONNECT
A method forming an interconnect structure includes depositing a first solder bump on a chip; depositing a second solder bump on a laminate, the second solder bump including a nickel copper colloid surrounded by a nickel or copper shell and suspended in a tin-based solder; aligning the chip with the laminate; performing a first reflow process to join the chip to the laminate; depositing an underfill material around the first solder bump and the second solder bump; and performing a second reflow process at a temperature that is lower than the first reflow process to convert the first solder bump and the second solder bump to an all intermetallic interconnect; wherein depositing the underfill material is performed before or after performing the second reflow process.
STRUCTURES AND METHODS TO ENABLE A FULL INTERMETALLIC INTERCONNECT
A method forming an interconnect structure includes depositing a first solder bump on a chip; depositing a second solder bump on a laminate, the second solder bump including a nickel copper colloid surrounded by a nickel or copper shell and suspended in a tin-based solder; aligning the chip with the laminate; performing a first reflow process to join the chip to the laminate; depositing an underfill material around the first solder bump and the second solder bump; and performing a second reflow process at a temperature that is lower than the first reflow process to convert the first solder bump and the second solder bump to an all intermetallic interconnect; wherein depositing the underfill material is performed before or after performing the second reflow process.
STRUCTURES AND METHODS TO ENABLE A FULL INTERMETALLIC INTERCONNECT
A method forming an interconnect structure includes depositing a first solder bump on a chip; depositing a second solder bump on a laminate, the second solder bump including a nickel copper colloid surrounded by a nickel or copper shell and suspended in a tin-based solder; aligning the chip with the laminate; performing a first reflow process to join the chip to the laminate; depositing an underfill material around the first solder bump and the second solder bump; and performing a second reflow process at a temperature that is lower than the first reflow process to convert the first solder bump and the second solder bump to an all intermetallic interconnect; wherein depositing the underfill material is performed before or after performing the second reflow process.
SEMICONDUCTOR DEVICES AND METHODS OF FORMING THE SAME
According to aspects provided herein, a semiconductor device may include a bump providing improved reliability and reduced size. In some aspects, a conductive pad may be formed on a substrate, and a conductive support layer, which may be a pillar, may be formed on the conductive pad. An intermetallic compound (IMC) layer may be formed on the conductive support layer, and a solder layer may be formed on the IMC layer. In some aspects, the conductive support layer may be of a smaller width than the IMC layer. In some aspects, the conductive support layer may have side surfaces which are wider at the solder side than at the conductive pad side. In some aspects, other layers may be formed, such as a seed layer between the conductive pad and the conductive support layer, or a barrier layer between the conductive support layer and the IMC layer.
ELECTRONIC DEVICE, ELECTRONIC PART, AND SOLDER
An electronic device includes a first electronic part, a second electronic part opposite the first electronic part, and a bonding portion between the first electronic part and the second electronic part. The bonding portion contains a solder containing a substance whose crystal structure reversibly changes in temperature rise and fall processes which accompany the operation of the electronic device or electronic equipment including the electronic device. A change in the crystal structure of the substance contained in the solder promotes recovery and recrystallization of the solder in the temperature rise and fall processes which accompany the operation of the electronic device or the electronic equipment. As a result, the coarsening of crystal grains in the solder is suppressed.
ELECTRONIC DEVICE, ELECTRONIC PART, AND SOLDER
An electronic device includes a first electronic part, a second electronic part opposite the first electronic part, and a bonding portion between the first electronic part and the second electronic part. The bonding portion contains a solder containing a substance whose crystal structure reversibly changes in temperature rise and fall processes which accompany the operation of the electronic device or electronic equipment including the electronic device. A change in the crystal structure of the substance contained in the solder promotes recovery and recrystallization of the solder in the temperature rise and fall processes which accompany the operation of the electronic device or the electronic equipment. As a result, the coarsening of crystal grains in the solder is suppressed.