Patent classifications
H01L2224/13313
Resin fluxed solder paste, and mount structure
Provided herein is a resin fluxed solder paste that exhibits a desirable solder bump reinforcement effect without requiring an underfill process. The disclosure also provides a mount structure. The resin fluxed solder paste includes a non-resinic powder containing a solder powder and an inorganic powder; and a flux containing a first epoxy resin, a curing agent, and an organic acid. The non-resinic powder accounts for 30 to 90 wt % of the total, and the surface of the inorganic powder is covered with an organic resin.
Conductive particle, and connection material, connection structure, and connecting method of circuit member
There is provided a conductive particle including a core particle containing a resin material, and a surface layer that covers a surface of the core particle and contains a solder material, in which a melting point of the solder material is equal to or lower than a softening point of the resin material.
MICRO DEVICE TRANSFERRING METHOD, AND MICRO DEVICE SUBSTRATE MANUFACTURED BY MICRO DEVICE TRANSFERRING METHOD
A method for transferring a micro device, includes: a compression step in which a carrier film having a micro-device attached to an adhesive layer thereof is brought into contact with a substrate comprising a solder deposited on metal electrodes formed on the substrate and is compressed on the substrate; a first adhesive strength generation step in which the solder disposed between the micro-device and the metal electrodes is compressed in the compression step to generate first adhesive strength between the micro-device and the solder; a second adhesive generation step in which the micro-device is bonded to the adhesive layer through press-fitting in the compression step to generate second adhesive strength between the micro-device and the adhesive layer; and a release step in which the carrier film is separated from the substrate, with the micro-device adhered to the solder.
MICRO DEVICE TRANSFERRING METHOD, AND MICRO DEVICE SUBSTRATE MANUFACTURED BY MICRO DEVICE TRANSFERRING METHOD
A method for transferring a micro device, includes: a compression step in which a carrier film having a micro-device attached to an adhesive layer thereof is brought into contact with a substrate comprising a solder deposited on metal electrodes formed on the substrate and is compressed on the substrate; a first adhesive strength generation step in which the solder disposed between the micro-device and the metal electrodes is compressed in the compression step to generate first adhesive strength between the micro-device and the solder; a second adhesive generation step in which the micro-device is bonded to the adhesive layer through press-fitting in the compression step to generate second adhesive strength between the micro-device and the adhesive layer; and a release step in which the carrier film is separated from the substrate, with the micro-device adhered to the solder.
WAFER LEVEL INTEGRATION INCLUDING DESIGN/CO-DESIGN, STRUCTURE PROCESS, EQUIPMENT STRESS MANAGEMENT AND THERMAL MANAGEMENT
A method of manufacturing a multi-layer wafer is provided. The method comprises applying at least one stress compensating polymer layer to at least one of two heterogeneous wafers and low temperature bonding the two heterogeneous wafers to bond the stress compensating polymer layer to the other of the two heterogeneous wafers to form a multi-layer wafer pair. The multi-layer wafer comprises two heterogeneous wafers, at least one of the heterogeneous wafers having a stress compensating polymer layer. The two heterogeneous wafers are low temperature bonded together to bond the stress compensating polymer layer to the other of the two heterogeneous wafers.
WAFER LEVEL INTEGRATION INCLUDING DESIGN/CO-DESIGN, STRUCTURE PROCESS, EQUIPMENT STRESS MANAGEMENT AND THERMAL MANAGEMENT
A method of manufacturing a multi-layer wafer is provided. The method comprises applying at least one stress compensating polymer layer to at least one of two heterogeneous wafers and low temperature bonding the two heterogeneous wafers to bond the stress compensating polymer layer to the other of the two heterogeneous wafers to form a multi-layer wafer pair. The multi-layer wafer comprises two heterogeneous wafers, at least one of the heterogeneous wafers having a stress compensating polymer layer. The two heterogeneous wafers are low temperature bonded together to bond the stress compensating polymer layer to the other of the two heterogeneous wafers.
Advanced Solder Alloys For Electronic Interconnects
Improved electrical and thermal properties of solder alloys are achieved by the use of micro-additives in solder alloys to engineer the electrical and thermal properties of the solder alloys and the properties of the reaction layers between the solder and the metal surfaces. The electrical and thermal conductivity of alloys and that of the reaction layers between the solder and the -metal surfaces can be controlled over a wide range of temperatures. The solder alloys produce stable microstructures wherein such stable microstructures of these alloys do not exhibit significant changes when exposed to changes in temperature, compared to traditional interconnect materials.
SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THEREOF
A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section view, and a distance from the first position to the first out contour is greater than that from the second position to the first outer contour.
VOID REDUCTION IN SOLDER JOINTS USING OFF-EUTECTIC SOLDER
Embodiments herein may relate to an apparatus with a package that includes a first substrate soldered to a second substrate via solder comprising an off-eutectic solder material. The off-eutectic solder material may form a joint between the first substrate and the second substrate. The off-eutectic solder material may be any suitable material that melts over a range of temperatures, which may provide a relatively slow collapse of the off-eutectic solder material during a melting process. The relatively slow collapse may provide a sufficient amount of time for gases to escape prior to collapse, and thus, the joint between the first substrate and the second substrate may have less voids compared to joints formed using eutectic solder materials. Other embodiments may be described and/or claimed.
VOID REDUCTION IN SOLDER JOINTS USING OFF-EUTECTIC SOLDER
Embodiments herein may relate to an apparatus with a package that includes a first substrate soldered to a second substrate via solder comprising an off-eutectic solder material. The off-eutectic solder material may form a joint between the first substrate and the second substrate. The off-eutectic solder material may be any suitable material that melts over a range of temperatures, which may provide a relatively slow collapse of the off-eutectic solder material during a melting process. The relatively slow collapse may provide a sufficient amount of time for gases to escape prior to collapse, and thus, the joint between the first substrate and the second substrate may have less voids compared to joints formed using eutectic solder materials. Other embodiments may be described and/or claimed.