Produced is a metal ball which suppresses an emitted dose. Contained are the steps of melting a pure metal by heating the pure metal at a temperature which is higher than a boiling point of an impurity to be removed, higher than a melting point of the pure metal, and lower than a boiling point of the pure metal, the pure metal containing a U content of 5 ppb or less, a Th content of 5 ppb or less, purity of 99.9% or more and 99.995% or less, and a Pb or Bi content or a total content of Pb and Bi of 1 ppm or more, and the pure metal having the boiling point higher than the boiling point at atmospheric pressure of the impurity to be removed; and sphering the molten pure metal in a ball.

Produced is a metal ball which suppresses an emitted dose. Contained are the steps of melting a pure metal by heating the pure metal at a temperature which is higher than a boiling point of an impurity to be removed, higher than a melting point of the pure metal, and lower than a boiling point of the pure metal, the pure metal containing a U content of 5 ppb or less, a Th content of 5 ppb or less, purity of 99.9% or more and 99.995% or less, and a Pb or Bi content or a total content of Pb and Bi of 1 ppm or more, and the pure metal having the boiling point higher than the boiling point at atmospheric pressure of the impurity to be removed; and sphering the molten pure metal in a ball.

A semiconductor package may include a package substrate having a first surface and a second surface, which are opposite to each other, and including a trench formed in the first surface, a substrate pad provided on the package substrate to cover a bottom surface of the trench, a conductive coupling pattern in contact with a top surface of the substrate pad, an anisotropic conductive pattern provided on the conductive coupling pattern and the substrate pad to fill the trench, the anisotropic conductive pattern including conductive capsules and a polymer layer enclosing the conductive capsules, a semiconductor chip mounted on the first surface of the package substrate, and a coupling pillar pattern provided between the package substrate and the semiconductor chip and connected to the conductive coupling pattern in the trench. A top surface of the anisotropic conductive pattern may be coplanar with the first surface of the package substrate.