An electronic device according to a present disclosure includes a semiconductor substrate, a chip, and a connection part. The chip has a different thermal expansion rate from that of the semiconductor substrate. The connection part includes a porous metal layer for connecting connection pads that are arranged on opposing principle surfaces of the semiconductor substrate and the chip.

A micro light emitting diode (LED) transfer device includes a transfer part configured to transfer a relay substrate having at least one micro LED; a mask having openings corresponding to a position of the at least one micro LED; a first laser configured to irradiate a first laser light having a first wavelength to the mask; a second laser configured to irradiate a second laser light having a second wavelength different from the first wavelength to the mask; and a processor configured to: control the at least one micro LED to contact a coupling layer of a target substrate, and based on the coupling layer contacting the at least one micro LED, control the first laser to irradiate the first laser light toward the at least one micro LED, and subsequently control the second laser to irradiate the second laser light toward the at least one micro LED.

A micro light emitting diode (LED) transfer device includes a transfer part configured to transfer a relay substrate having at least one micro LED; a mask having openings corresponding to a position of the at least one micro LED; a first laser configured to irradiate a first laser light having a first wavelength to the mask; a second laser configured to irradiate a second laser light having a second wavelength different from the first wavelength to the mask; and a processor configured to: control the at least one micro LED to contact a coupling layer of a target substrate, and based on the coupling layer contacting the at least one micro LED, control the first laser to irradiate the first laser light toward the at least one micro LED, and subsequently control the second laser to irradiate the second laser light toward the at least one micro LED.

An electroplating method that is a conventional method has had a problem that it is difficult to manufacture fine pillars without being affected by an undercut. Furthermore, an electroless plating method has had a problem that it is difficult to manufacture pillars having the same shape without any void. The inventors have performed intensive investigations to solve the above problems and, as a result, have found that fine conductive pillars with a high aspect ratio can be readily manufactured on a substrate having an electrode section in such a manner that after a conductive paste containing metal micro-particles is applied in a reduced pressure state, the conductive paste is exposed to standard pressure. The present invention has a particular effect on the manufacture of a metal pillar that is a terminal for flip-chip mounting.

An electroplating method that is a conventional method has had a problem that it is difficult to manufacture fine pillars without being affected by an undercut. Furthermore, an electroless plating method has had a problem that it is difficult to manufacture pillars having the same shape without any void. The inventors have performed intensive investigations to solve the above problems and, as a result, have found that fine conductive pillars with a high aspect ratio can be readily manufactured on a substrate having an electrode section in such a manner that after a conductive paste containing metal micro-particles is applied in a reduced pressure state, the conductive paste is exposed to standard pressure. The present invention has a particular effect on the manufacture of a metal pillar that is a terminal for flip-chip mounting.

The known electrolytic plating method is disadvantageous in that it is difficult to form thin pillars without being influenced by undercuts. The electroless plating method is disadvantageous in that it is difficult to form pillars in the same shape without voids. As a solution to these, the electrically conductive paste according to the present invention for forming pillars is used to make pillars by filling. This helps prevent undercuts, and it is also intended to provide metal pillars in the same shape with good reproducibility. The inventors found that an electrically conductive paste that is very small fine metal particles and contains a particular percentage of fine metal particles is extraordinarily advantageous in forming pillars.

The known electrolytic plating method is disadvantageous in that it is difficult to form thin pillars without being influenced by undercuts. The electroless plating method is disadvantageous in that it is difficult to form pillars in the same shape without voids. As a solution to these, the electrically conductive paste according to the present invention for forming pillars is used to make pillars by filling. This helps prevent undercuts, and it is also intended to provide metal pillars in the same shape with good reproducibility. The inventors found that an electrically conductive paste that is very small fine metal particles and contains a particular percentage of fine metal particles is extraordinarily advantageous in forming pillars.

A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.

A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.

Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate, a first die coupled to the package substrate with first interconnects, and a second die coupled to the first die with second interconnects, wherein the second die is coupled to the package substrate with third interconnects, a communication network is at least partially included in the first die and at least partially included in the second die, and the communication network includes a communication pathway between the first die and the second die.