H01L2224/13364

Method of forming solder bumps

A method of forming solder bumps includes preparing a substrate having a surface on which a plurality of electrode pads are formed, forming a resist layer on the substrate, the resist layer having a plurality of openings, each of the openings being aligned with a corresponding electrode pad of the plurality of electrode pads, forming a conductive pillar in each of the openings of the resist layer, forming conductive layers to cover at least side walls of the resist layer in the openings to block gas emanating from the resist layer, filling molten solder in each of the openings in which the conductive layers has been formed and removing the resist layer.

Method of forming solder bumps

A method of forming solder bumps includes preparing a substrate having a surface on which a plurality of electrode pads are formed, forming a resist layer on the substrate, the resist layer having a plurality of openings, each of the openings being aligned with a corresponding electrode pad of the plurality of electrode pads, forming a conductive pillar in each of the openings of the resist layer, forming conductive layers to cover at least side walls of the resist layer in the openings to block gas emanating from the resist layer, filling molten solder in each of the openings in which the conductive layers has been formed and removing the resist layer.

Method of forming solder bumps

A method of forming solder bumps includes preparing a substrate having a surface on which a plurality of electrode pads are formed, forming a resist layer on the substrate, the resist layer having a plurality of openings, each of the openings being aligned with a corresponding electrode pad of the plurality of electrode pads, forming a conductive pillar in each of the openings of the resist layer, forming conductive layers to cover at least side walls of the resist layer in the openings to block gas emanating from the resist layer, filling molten solder in each of the openings in which the conductive layers has been formed and removing the resist layer.

Method of forming solder bumps

A method of forming solder bumps includes preparing a substrate having a surface on which a plurality of electrode pads are formed, forming a resist layer on the substrate, the resist layer having a plurality of openings, each of the openings being aligned with a corresponding electrode pad of the plurality of electrode pads, forming a conductive pillar in each of the openings of the resist layer, forming conductive layers to cover at least side walls of the resist layer in the openings to block gas emanating from the resist layer, filling molten solder in each of the openings in which the conductive layers has been formed and removing the resist layer.

Electronic element and electronic device comprising the same

A first electronic element is disclosed, which includes: a first substrate having a first surface; a first electrode pad disposed on the first surface, wherein the first electrode pad has a second surface away from the first substrate; and an insulating layer disposed on the first surface, wherein the insulating layer includes an opening, the opening is disposed correspondingly to the first electrode pad, and the opening overlaps the first electrode pad in a normal direction of the first surface, wherein the insulating layer has a third surface away from the first substrate, a distance between the third surface and the second surface in the normal direction of the first surface is defined as a first distance, and the first distance is greater than 0 m and less than or equal to 14 m. In addition, the disclosure further provides an electronic device including the first electronic element.

Electronic element and electronic device comprising the same

A first electronic element is disclosed, which includes: a first substrate having a first surface; a first electrode pad disposed on the first surface, wherein the first electrode pad has a second surface away from the first substrate; and an insulating layer disposed on the first surface, wherein the insulating layer includes an opening, the opening is disposed correspondingly to the first electrode pad, and the opening overlaps the first electrode pad in a normal direction of the first surface, wherein the insulating layer has a third surface away from the first substrate, a distance between the third surface and the second surface in the normal direction of the first surface is defined as a first distance, and the first distance is greater than 0 m and less than or equal to 14 m. In addition, the disclosure further provides an electronic device including the first electronic element.

Method of forming solder bumps

A method of forming solder bumps includes preparing a substrate having a surface on which a plurality of electrode pads are formed, forming a resist layer on the substrate, the resist layer having a plurality of openings, each of the openings being aligned with a corresponding electrode pad of the plurality of electrode pads, forming a conductive pillar in each of the openings of the resist layer, forming conductive layers to cover at least side walls of the resist layer in the openings to block gas emanating from the resist layer, filling molten solder in each of the openings in which the conductive layers has been formed and removing the resist layer.

Method of forming solder bumps

A method of forming solder bumps includes preparing a substrate having a surface on which a plurality of electrode pads are formed, forming a resist layer on the substrate, the resist layer having a plurality of openings, each of the openings being aligned with a corresponding electrode pad of the plurality of electrode pads, forming a conductive pillar in each of the openings of the resist layer, forming conductive layers to cover at least side walls of the resist layer in the openings to block gas emanating from the resist layer, filling molten solder in each of the openings in which the conductive layers has been formed and removing the resist layer.

SEMICONDUCTOR DEVICE CONNECTIONS WITH SINTERED NANOPARTICLES
20200185322 · 2020-06-11 ·

In a described example, a packaged device includes a substrate having a device mounting surface with conductive lands having a first thickness spaced from one another on the device mounting surface. A first polymer layer is disposed on the device mounting surface between the conductive lands having a second thickness equal to the first thickness. The conductive lands have an outer surface not covered by the first polymer layer. A second polymer layer is disposed on the first polymer layer, the outer surface of the conductive lands not covered by the second polymer layer. Conductive nanoparticle material is disposed on the outer surface of the conductive lands. A third polymer layer is disposed on the second polymer layer between the conductive nanoparticle material on the conductive lands. At least one semiconductor device die is mounted to the third polymer layer having electrical terminals bonded to the conductive nanoparticle material.

SEMICONDUCTOR DEVICE CONNECTIONS WITH SINTERED NANOPARTICLES
20200185322 · 2020-06-11 ·

In a described example, a packaged device includes a substrate having a device mounting surface with conductive lands having a first thickness spaced from one another on the device mounting surface. A first polymer layer is disposed on the device mounting surface between the conductive lands having a second thickness equal to the first thickness. The conductive lands have an outer surface not covered by the first polymer layer. A second polymer layer is disposed on the first polymer layer, the outer surface of the conductive lands not covered by the second polymer layer. Conductive nanoparticle material is disposed on the outer surface of the conductive lands. A third polymer layer is disposed on the second polymer layer between the conductive nanoparticle material on the conductive lands. At least one semiconductor device die is mounted to the third polymer layer having electrical terminals bonded to the conductive nanoparticle material.