A display device includes: a display panel driven to display an image, the display panel including a substrate including a display area at which the image is displayed; a terminal pad on the substrate and through which a driving signal is applied to the display area; a driving chip through which the driving signal is applied to the terminal pad; and a non-conductive film which fixes the driving chip to the substrate. The driving chip includes: a non-conductive elastic support body projected from a surface of the driving chip; a bump wiring on the non-conductive elastic support body, the bump wiring directly contacting the terminal pad to apply the driving signal to the terminal pad; and a dispersed particle on the non-conductive elastic support body.

A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the lead frame. A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the lead frame and with a reflow wall that surrounds a portion of the solder joint that couples the semiconductor device to the lead frame. A packaged semiconductor device with a reflow wall that surrounds a portion of a solder joint that couples a semiconductor device to a lead frame.

A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the lead frame. A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the lead frame and with a reflow wall that surrounds a portion of the solder joint that couples the semiconductor device to the lead frame. A packaged semiconductor device with a reflow wall that surrounds a portion of a solder joint that couples a semiconductor device to a lead frame.

A display device includes: a display panel driven to display an image, the display panel including a substrate including a display area at which the image is displayed; a terminal pad on the substrate and through which a driving signal is applied to the display area; a driving chip through which the driving signal is applied to the terminal pad; and a non-conductive film which fixes the driving chip to the substrate. The driving chip includes: a non-conductive elastic support body projected from a surface of the driving chip; a bump wiring on the non-conductive elastic support body, the bump wiring directly contacting the terminal pad to apply the driving signal to the terminal pad; and a dispersed particle on the non-conductive elastic support body.

Microelectronic assemblies fabricated using hybrid manufacturing for integrating photonic and electronic components, as well as related devices and methods, are disclosed herein. As used herein, hybrid manufacturing refers to fabricating a microelectronic assembly by bonding at least two IC structures fabricated using different manufacturers, materials, or manufacturing techniques. Before bonding, at least one IC structure may include photonic components such as optical waveguides, electro-optic modulators, and monolithically integrated lenses, and at least one may include electronic components such as electrically conductive interconnects, transistors, and resistors. One or more additional electronic and/or photonic components may be provided in one or more of these IC structures after bonding. For example, an interconnect implemented as an electrically conductive via or a waveguide implemented as a dielectric via may be provided after bonding to extend through one or more of the bonded IC structures.

Microelectronic assemblies fabricated using hybrid manufacturing for integrating photonic and electronic components, as well as related devices and methods, are disclosed herein. As used herein, hybrid manufacturing refers to fabricating a microelectronic assembly by bonding at least two IC structures fabricated using different manufacturers, materials, or manufacturing techniques. Before bonding, at least one IC structure may include photonic components such as optical waveguides, electro-optic modulators, and monolithically integrated lenses, and at least one may include electronic components such as electrically conductive interconnects, transistors, and resistors. One or more additional electronic and/or photonic components may be provided in one or more of these IC structures after bonding. For example, an interconnect implemented as an electrically conductive via or a waveguide implemented as a dielectric via may be provided after bonding to extend through one or more of the bonded IC structures.

A substrate includes a support layer, a column-shaped first bump, and a second bump. The support layer has a main surface. The first bump is filled with a first conductive metal and also has a first upper surface and a side surface. The second bump includes a plurality of fine particles formed of a second conductive metal and also has a third portion configured to cover the first upper surface and a fourth portion configured to cover a part of the side surface. The first bump is disposed on the main surface, or the first bump is connected to an electrode disposed on the main surface. The second bump has a convex second upper surface. A height of the fourth portion in a direction perpendicular to the first upper surface is smaller than that of the first bump.

A substrate includes a support layer, a column-shaped first bump, and a second bump. The support layer has a main surface. The first bump is filled with a first conductive metal and also has a first upper surface and a side surface. The second bump includes a plurality of fine particles formed of a second conductive metal and also has a third portion configured to cover the first upper surface and a fourth portion configured to cover a part of the side surface. The first bump is disposed on the main surface, or the first bump is connected to an electrode disposed on the main surface. The second bump has a convex second upper surface. A height of the fourth portion in a direction perpendicular to the first upper surface is smaller than that of the first bump.

A method of making an assembly can include forming a first conductive element at a first surface of a substrate of a first component, forming conductive nanoparticles at a surface of the conductive element by exposure to an electroless plating bath, juxtaposing the surface of the first conductive element with a corresponding surface of a second conductive element at a major surface of a substrate of a second component, and elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles cause metallurgical joints to form between the juxtaposed first and second conductive elements. The conductive nanoparticles can be disposed between the surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers.

A method of making an assembly can include forming a first conductive element at a first surface of a substrate of a first component, forming conductive nanoparticles at a surface of the conductive element by exposure to an electroless plating bath, juxtaposing the surface of the first conductive element with a corresponding surface of a second conductive element at a major surface of a substrate of a second component, and elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles cause metallurgical joints to form between the juxtaposed first and second conductive elements. The conductive nanoparticles can be disposed between the surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers.