Patent classifications
H01L2224/13847
STRUCTURES AND METHODS FOR LOW TEMPERATURE BONDING
A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.
Electronic component
A semiconductor device includes: a wiring board including a first electrode pad on a surface thereof; a circuit board disposed to stand on the wiring board, and including an interconnection connected to the first electrode pad; and a semiconductor package disposed to face the wiring board with the circuit board interposed therebetween, and including a second electrode pad on a surface thereof, the second electrode pad being connected to the interconnection.