Controllers for power converters, power converters and corresponding methods are provided.

A controller of a power converter including a first power stage and a second power stage receives an indication of an output voltage of the power converter, where the indication is measured at the primary side of the power converter. Based on the indication, a control related to an intermediate voltage of the power converter is performed.

A control method of a three-phase multi-level inverter includes: determining a modulation ratio based on output of the three-phase multi-level inverter, where the modulation ratio indicates a ratio of an amplitude value of a sinusoidal modulation wave in pulse width modulation to an amplitude value of a carrier; generating, based on the modulation ratio and a modulation ratio threshold, a common-mode voltage regulation signal for regulating a common-mode voltage in phase voltages of the three-phase multi-level inverter; adding the common-mode voltage regulation signal and a differential-mode voltage regulation signal for regulating a differential-mode voltage in the phase voltages of the three-phase multi-level inverter to obtain a composite regulation signal, where the composite regulation signal is presented as a modulation wave for discontinuous pulse width modulation (DPWM); and generating, based on the composite regulation signal, drive signals for controlling switches of phases of the three-phase multi-level inverter.

Disclosed is a silicon carbide MOSFET device and a manufacturing method thereof. The manufacturing method comprises: forming a source region in an epitaxial layer; forming a body region in the epitaxial layer; forming a gate structure, comprising a gate dielectric layer, a gate conductor layer and an interlayer dielectric layer; forming an opening in the interlayer dielectric layer to expose the source region; forming a source contact connected to the source region via the opening, wherein an ion implantation angle of the ion implantation process is controlled to make a transverse extension range of the body region larger than a transverse extension range of the source region, so that a channel that extends transversely is formed by a portion, which is peripheral to the source region, of the body region, and at least a portion of the gate conductor layer is located above the channel.

A circuit comprises first and second input supply nodes configured to receive a supply voltage therebetween. The circuit comprises a high-side driver circuit configured to be coupled to a high-side switch and produce a first signal between first and second high-side output nodes. The circuit comprises a low-side driver circuit configured to be coupled to a low-side switch and produce a second signal between first and second low-side output nodes. The circuit comprises a floating node configured to receive a floating voltage applied between the floating node and the second high-side output node, a bootstrap diode between the first input supply node and an intermediate node, and a current limiter circuit between the intermediate node and the floating node and configured to sense the floating voltage and counter a current flow from the intermediate node to the floating node as a result of the floating voltage reaching a threshold value.

A conversion circuit and an adapter that resolve a voltage drop problem of a power supply of a driver in an ACF circuit. The conversion circuit includes an active clamp flyback circuit, a drive circuit, and a replenishment power transistor. The active clamp flyback circuit is configured to perform power conversion. The drive circuit is configured to output a drive signal and a reference voltage. The drive signal is used to drive the active clamp flyback circuit. A first terminal of the replenishment power transistor is coupled to an input terminal of the active clamp flyback circuit, a second terminal of the replenishment power transistor is coupled to a power supply terminal of the drive circuit, and a gate of the replenishment power transistor is configured to receive the reference voltage.

A method for controlling an LLC resonance converter controls a converter through the steps of detecting parameter values related to operation of the converter, determining a switching duty of the converter on the basis of the detected parameter values, and controlling the converter with the determined switching duty to improve nonlinearity of a gain curve of the converter, thereby reducing output current ripples and achieving low-gain output.

An embodiment converter includes a magnetic material, a first circuit including a first winding surrounding the magnetic material and a clamp circuit configured to reset a power conversion operation, the first circuit being configured to convert power received from a first input voltage source to provide the converted power to a load, and a second circuit including a second winding surrounding the magnetic material, the second circuit being configured to convert power received from a second input voltage source to provide the converted power to the load and to perform the power conversion operation being reset by the clamp circuit.

A circuit with a metal-oxide semiconductor field-effect transistor and a diode module is applied to a power factor correction circuit, which can effectively reduce the heat generated by the whole system under heavy load, The circuit includes a metal-oxide semiconductor field-effect transistor and a diode module and a load determination unit. The diode module includes a plurality of diodes with a switch. The load determination unit can control the connection/disconnection of each diode in the diode module based on the magnitude of the load current. It can effectively reduce the current generated by each diode due to the load, thereby reducing the heat generation of the overall system. Moreover, due to the contact capacitance effect after the diodes are connected in parallel, the electromagnetic interference (EMI) characteristics of the power factor correction circuit of the system can be further optimized.

A multi-phase interleaved PFC converter includes at least six switches coupled in a multi-phase interleaved circuit arrangement, and a control circuit. The control circuit is configured to turn on and turn off a first one of the switches according to a PWM signal to operate the first switch as an active switch having an off-time as a function of a duty cycle of the PWM signal, while turning on and turning off a second one of the switches as a synchronous switch. The control circuit is also configured to receive signal(s) indicative of currents in each phase of the interleaved circuit arrangement, set an on-time of the second switch equal to the off-time of the first switch when the signal(s) indicate continuous mode operation, and set the on-time of the second switch to a duration less than the off-time of the first switch when the signal(s) indicate discontinuous mode operation.

A switching regulator includes a first switch circuit, a second switch circuit, and a protection circuit. The first switch circuit has a first connection node coupled to a first reference voltage, and a second connection node coupled to one end of an inductor. The second switch circuit has a first connection node coupled to a second reference voltage, and a second connection node coupled to the one end of the inductor. The protection circuit senses a voltage level at the first connection node of the first switch circuit, and selectively enables an auxiliary current path in response to the voltage level at the first connection node of the first switch circuit, wherein the auxiliary current path and at least the first switch circuit are arranged in a parallel connection fashion.