Patent classifications
Y02E10/546
TRENCH PROCESS AND STRUCTURE FOR BACKSIDE CONTACT SOLAR CELLS WITH POLYSILICON DOPED REGIONS
A solar cell includes polysilicon P-type and N-type doped regions on a backside of a substrate, such as a silicon wafer. A trench structure separates the P-type doped region from the N-type doped region. Each of the P-type and N-type doped regions may be formed over a thin dielectric layer. The trench structure may include a textured surface for increased solar radiation collection. Among other advantages, the resulting structure increases efficiency by providing isolation between adjacent P-type and N-type doped regions, thereby preventing recombination in a space charge region where the doped regions would have touched.
UV-curing of light-receiving surfaces of solar cells
Methods of fabricating solar cells using UV-curing of light-receiving surfaces of the solar cells, and the resulting solar cells, are described herein. In an example, a method of fabricating a solar cell includes forming a passivating dielectric layer on a light-receiving surface of a silicon substrate. The method also includes forming an anti-reflective coating (ARC) layer below the passivating dielectric layer. The method also includes exposing the ARC layer to ultra-violet (UV) radiation. The method also includes, subsequent to exposing the ARC layer to ultra-violet (UV) radiation, thermally annealing the ARC layer.
Solar cell assembly and method of manufacturing solar cell
A solar cell assembly includes a plurality of solar cells and an inter-cell region provided between adjacent ones of the solar cells included in the plurality of solar cells. Each of the solar cells and the inter-cell region includes: a semiconductor substrate having a first conductivity type and having a first main surface and a second main surface that face away from each other; a first amorphous semiconductor layer having a second conductivity type and being provided on a first main surface side of the semiconductor substrate; an insulating layer provided on part of the first amorphous semiconductor layer; and a first transparent conductive film provided on the first amorphous semiconductor layer so as to cover the insulating layer. In a plan view of the solar cell assembly, the insulating layer is provided along the inter-cell region and partially overlapping the inter-cell region.
Tri-layer semiconductor stacks for patterning features on solar cells
Tri-layer semiconductor stacks for patterning features on solar cells, and the resulting solar cells, are described herein. In an example, a solar cell includes a substrate. A semiconductor structure is disposed above the substrate. The semiconductor structure includes a P-type semiconductor layer disposed directly on a first semiconductor layer. A third semiconductor layer is disposed directly on the P-type semiconductor layer. An outermost edge of the third semiconductor layer is laterally recessed from an outermost edge of the first semiconductor layer by a width. An outermost edge of the P-type semiconductor layer is sloped from the outermost edge of the third semiconductor layer to the outermost edge of the third semiconductor layer. A conductive contact structure is electrically connected to the semiconductor structure.
SOLAR CELLS HAVING HYBRID ARCHITECTURES INCLUDING DIFFERENTIATED P-TYPE AND N-TYPE REGIONS
A solar cell, and methods of fabricating said solar cell, are disclosed. The solar cell can include a substrate having a light-receiving surface and a back surface. The solar cell can include a first semiconductor region of a first conductivity type disposed on a first dielectric layer, wherein the first dielectric layer is disposed on the substrate. The solar cell can also include a second semiconductor region of a second, different, conductivity type disposed on a second dielectric layer, where a portion of the second thin dielectric layer is disposed between the first and second semiconductor regions. The solar cell can include a third dielectric layer disposed on the second semiconductor region. The solar cell can include a first conductive contact disposed over the first semiconductor region but not the third dielectric layer. The solar cell can include a second conductive contact disposed over the second semiconductor region, where the second conductive contact is disposed over the third dielectric layer and second semiconductor region. In an embodiment, the third dielectric layer can be a dopant layer.
Drying method of polyimide paste and manufacturing method of solar cell having high photoelectric conversion efficiency
A drying method of a polyimide paste which can maintain a printing shape while maintaining productivity includes an organic solvent and a polyimide resin dissolved in the organic solvent, and which becomes cured polyimide by being cured as a result of being dried and heated, the drying method including a step of applying the polyimide paste to a surface of a base material, a step of applying a solvent including a polar material to a surface of the base material at least at a portion where the polyimide paste is applied, and a step of, after applying the solvent including the polar material, drying the polyimide paste and the solvent including the polar material.
METHOD OF MANUFACTURING .Math.-TANDEM PHOTOVOLTAIC CELLS AND .Math.-TANDEM PHOTOVOLTAIC CELL PRODUCED BY THIS METHOD
A method of producing photovoltaic cells with the μ-tandem architecture based on crystalline silicon substrates and quantum dots, ensuring both effective and stable operation of the entire tandem system as well as high absorption in the spectral range from UV to MIR and operation in scattered and incident light conditions at different angles, acting as an anti-reflective layer. A further purpose of the invention is to develop a new structure of a μ-tandem photovoltaic cell based on microcrystalline silicon (Si) layers and a layer of nanometric semiconductor structures with a core-shell architecture such that the resulting structures work as a tandem cell with the characteristics of micro-cells, connected together in its lower part.
Method of manufacturing μ-tandem photovoltaic cells and μ-tandem photovoltaic cell produced by this method
A method of producing photovoltaic cells with the μ-tandem architecture based on crystalline silicon substrates and quantum dots, ensuring both effective and stable operation of the entire tandem system as well as high absorption in the spectral range from UV to MIR and operation in scattered and incident light conditions at different angles, acting as an anti-reflective layer. A further purpose of the invention is to develop a new structure of a μ-tandem photovoltaic cell based on microcrystalline silicon (Si) layers and a layer of nanometric semiconductor structures with a core-shell architecture such that the resulting structures work as a tandem cell with the characteristics of micro-cells, connected together in its lower part.
Method and optoelectronic structure providing polysilicon photonic devices with different optical properties in different regions
Method and structural embodiments are described which provide an integrated structure using polysilicon material having different optical properties in different regions of the structure.
Solar cell emitter region fabrication using self-aligned implant and cap
Methods of fabricating solar cell emitter regions using self-aligned implant and cap, and the resulting solar cells, are described. In an example, a method of fabricating an emitter region of a solar cell involves forming a silicon layer above a substrate. The method also involves implanting, through a stencil mask, dopant impurity atoms in the silicon layer to form implanted regions of the silicon layer with adjacent non-implanted regions. The method also involves forming, through the stencil mask, a capping layer on and substantially in alignment with the implanted regions of the silicon layer. The method also involves removing the non-implanted regions of the silicon layer, wherein the capping layer protects the implanted regions of the silicon layer during the removing. The method also involves annealing the implanted regions of the silicon layer to form doped polycrystalline silicon emitter regions.