Patent classifications
Y02E10/547
Solar cell
A solar cell including: a silicon substrate; a back electrode; a doped silicon layer; an upper electrode, wherein the upper electrode includes a plurality of three-dimensional nanostructures extending along a same direction; an electrode lead, wherein a direction of the electrode lead intersects with the direction of the plurality of three-dimensional nanostructures; wherein the three-dimensional nanostructures includes a first rectangular structure, a second rectangular structure, and a triangular prism structure; the first rectangular structure, the second rectangular structure, and the triangular prism structure are stacked, a first width of a bottom surface of the triangular prism structure is equal to a second width of a top surface of the second rectangular structure, and is greater than a third width of a top surface of the first rectangular structure, materials of the first rectangular structure and the triangular prism structure are metal.
Tandem solar cell manufacturing method
Discussed is a tandem solar cell manufacturing method including etching a crystalline silicon substrate, whereby a solar cell can be obtained which does not have a pyramid-shaped defect on a surface of the substrate, inhibits the generation of a shunt through the substrate having excellent surface roughness properties, and can secure fill factor properties, the solar cell being capable of being obtained through the tandem solar cell manufacturing method. The method includes preparing a crystalline silicon substrate; performing an isotropic etching process of the substrate; and removing a saw damage on a surface of the substrate by performing an anisotropic etching process of the isotropically etched substrate.
Solar cells having junctions retracted from cleaved edges
Methods of fabricating solar cells having junctions retracted from cleaved edges, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface, a back surface, and sidewalls. An emitter region is in the substrate at the light-receiving surface of the substrate. The emitter region has sidewalls laterally retracted from the sidewalls of the substrate. A passivation layer is on the sidewalls of the emitter region.
SOLAR CELL AND PHOTOVOLTAIC MODULE
A solar cell including: a substrate having front and back surfaces, the back surface includes first, second and gap regions, the first and second regions are staggered and spaced from each other in a first direction, and each gap region is provided between one first region and one second region adjacent thereto by recessing toward interior of the substrate; a first conductive layer formed over the first region; a second conductive layer formed over the second region, the second conductive layer has a conductivity type opposite to the first conductive layer; a first electrode forming electrical contact with the first conductive layer; a second electrode forming electrical contact with the second conductive layer; and a boundary region between the gap region and the first and/or second conductive layer adjacent thereto, and a line-pattern concave and convex texture structure is formed on the back surface corresponding to the boundary region.
In-cell bypass diode
A solar cell can include a built-in bypass diode. In one embodiment, the solar cell can include an active region disposed in or above a first portion of a substrate and a bypass diode disposed in or above a second portion of the substrate. The first and second portions of the substrate can be physically separated with a groove. A metallization structure can couple the active region to the bypass diode.
Solar module having a plurality of strings configured from a five strip cell
In an example, the present invention provides a method of manufacturing a solar module. The method includes providing a substrate member having a surface region, the surface region comprising a spatial region, a first end strip comprising a first edge region and a first interior region, the first interior region comprising a first bus bar, a plurality of strips, a second end strip comprising a second edge region and a second interior region, the second edge region comprising a second bus bar, the first end strip, the plurality of strips, and the second end strip arranged in parallel to each other and occupying the spatial region such that the first end strip, the second end strip, and the plurality of strips consists of a total number of five (5) strips. The method includes separating each of the plurality of strips, arranging the plurality of strips in a string configuration, and using the string in the solar module.
Solar cells with differentiated P-type and N-type region architectures
Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a solar cell can include a substrate having a light-receiving surface and a back surface. A first doped region of a first conductivity type, wherein the first doped region is disposed in a first portion of the back surface. A first thin dielectric layer disposed over the back surface of the substrate, where a portion of the first thin dielectric layer is disposed over the first doped region of the first conductivity type. A first semiconductor layer disposed over the first thin dielectric layer. A second doped region of a second conductivity type in the first semiconductor layer, where the second doped region is disposed over a second portion of the back surface. A first conductive contact disposed over the first doped region and a second conductive contact disposed over the second doped region.
Photoelectric converter, photoelectric conversion module, and electronic instrument
A photoelectric converter including a crystalline silicon substrate having a light receiving surface including a smooth section and a rough surface section having surface roughness greater than the surface roughness of the smooth section and a light transmissive inorganic film so provided as to overlap with the smooth section and the rough surface section, and the film thickness t1 of a portion of the inorganic film that is the portion where the inorganic film overlaps with the rough surface section is smaller than the film thickness t2 of a portion of the inorganic film that is the portion where the inorganic film overlaps with the smooth section. The arithmetic average roughness of the rough surface section is preferably greater than or equal to 0.1 μm.
WIRE-BASED METALLIZATION FOR SOLAR CELLS
Approaches for fabricating wire-based metallization for solar cells, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a back surface and an opposing light-receiving surface. A plurality of alternating N-type and P-type semiconductor regions is disposed in or above the back surface of the substrate. A conductive contact structure is disposed on the plurality of alternating N-type and P-type semiconductor regions. The conductive contact structure includes a plurality of metal wires. Each metal wire of the plurality of metal wires is parallel along a first direction to form a one-dimensional layout of a metallization layer for the solar cell.
SOLAR CELL AND PHOTOVOLTAIC MODULE
A solar cell and a photovoltaic module including the same are provided. The solar cell includes a substrate having a first surface and a second surface opposite to each other; a first passivation stack disposed on the first surface and including a first oxygen-rich dielectric layer, a first silicon-rich dielectric layer, a second oxygen-rich dielectric layer, and a second silicon-rich dielectric layer that are sequentially disposed in a direction away from the first surface, wherein an atomic fraction of oxygen in the first oxygen-rich dielectric layer is less than an atomic fraction of oxygen in the second oxygen-rich dielectric layer; a tunneling oxide layer disposed on the second surface; a doped conductive layer disposed on a surface of the tunneling oxide layer; and a second passivation layer disposed on a surface of the doped conductive layer.