Microstructures of micro and/or nano holes on one or more surfaces enhance photodetector optical sensitivity. Arrangements such as a CMOS Image Sensor (CIS) as an imaging LIDAR using a high speed photodetector array wafer of Si, Ge, a Ge alloy on SI and/or Si on Ge on Si, and a wafer of CMOS Logic Processor (CLP) ib Si fi signal amplification, processing and/or transmission can be stacked for electrical interaction. The wafers can be fabricated separately and then stacked or can be regions of the same monolithic chip. The image can be a time-of-flight image. Bayer arrays can be enhanced with microstructure holes. Pixels can be photodiodes, avalanche photodiodes, single photon avalanche photodiodes and phototransistors on the same array and can be Ge or Si pixels. The array can be of high speed photodetectors with data rates of 56 Gigabits per second, Gbps, or more per photodetector.

The present disclosure provides a method for rapidly treating a heterojunction solar cell fabricated using a crystalline silicon wafer doped exclusively with n-type dopants to improve surface passivation and carrier transport properties using the following steps: providing a heterojunction solar cell; the solar cell having an n-type silicon substrate exclusively doped with n-type dopants with a concentration higher than 1×10.sup.14 cm.sup.−3 and a plurality of metallic contacts; illuminating a surface portion of the solar cell for a period of less than 5 minutes and at a temperature between 200° C. and 300° C. with light having an intensity of at least 2 kW/m.sup.2 and a wavelength such that the light is absorbed by the surface portion and generates electron-hole pairs in the solar cell. The step of illuminating a surface portion of the solar cell is such that less than 0.5 kWh/m.sup.2 of energy is transferred to the surface portion and a temperature of the surface portion increases at a rate of at least 10° C./s for a period of time during illumination.

Tandem solar cell configurations are provided where at least one of the cells is a metal chalcogenide cell. A four-terminal tandem solar cell configuration has two electrically independent solar cells stacked on each other. A two-terminal solar cell configuration has two electrically coupled solar cells (same current through both cells) stacked on each other. Carrier selective contacts can be used to make contact to the metal chalcogenide cell (s) to alleviate the troublesome Fermi level pinning issue. Carrier-selective contacts can also remove the need to provide doping of the metal chalcogenide. Doping of the metal chalcogenide can be provided by charge transfer. These two ideas can be practiced independently or together in any combination.

A solar cell and a photovoltaic module including the solar cell. The solar cell includes: a semiconductor substrate including a first surface and a second surface opposite to each other; a first dielectric layer located on the first surface; a first N+ doped layer located on a surface of the first dielectric layer; a first passivation layer located on a surface of the first N+ doped layer; a first electrode located on a surface of the first passivation layer; a second dielectric layer located on the second surface; a first P+ doped layer located on a surface of the second dielectric layer; a second passivation layer located on a surface of the first P+ doped layer; and a second electrode located on a surface of the second passivation layer.

Methods of fabricating solar cell emitter regions with differentiated P-type and N-type regions architectures, and resulting solar cells, are described. In an example, a back contact solar cell includes a substrate having a light-receiving surface and a back surface. A first polycrystalline silicon emitter region of a first conductivity type is disposed on a first thin dielectric layer disposed on the back surface of the substrate. A second polycrystalline silicon emitter region of a second, different, conductivity type is disposed on a second thin dielectric layer disposed on the back surface of the substrate. A third thin dielectric layer is disposed laterally directly between the first and second polycrystalline silicon emitter regions. A first conductive contact structure is disposed on the first polycrystalline silicon emitter region. A second conductive contact structure is disposed on the second polycrystalline silicon emitter region.

Methods of fabricating solar cells having a plurality of sub-cells coupled by cell level interconnection, and the resulting solar cells, are described herein. In an example, a solar cell includes a plurality of sub-cells. Each of the plurality of sub-cells includes a singulated and physically separated semiconductor substrate portion. Each of the plurality of sub-cells includes an on-sub-cell metallization structure interconnecting emitter regions of the sub-cell. An inter-sub-cell metallization structure couples adjacent ones of the plurality of sub-cells. The inter-sub-cell metallization structure is different in composition from the on-sub-cell metallization structure.

Disclosed are a substrate for a solar cell and a method for manufacturing the same. The method include putting negative and positive electrodes facing away from each other into suspension in which at least two different types of negatively charged cellulose nanofibers are dispersed; applying a voltage across the positive and negative electrodes such that the cellulose fibers are adsorbed onto a surface of the negative electrode; and drying the negative electrode having the cellulose fibers adsorbed thereon.

A solar cell can include a built-in bypass diode. In one embodiment, the solar cell can include an active region disposed in or above a first portion of a substrate and a bypass diode disposed in or above a second portion of the substrate. The first and second portions of the substrate can be physically separated with a groove. A metallization structure can couple the active region to the bypass diode.

Methods of fabricating solar cells having junctions retracted from cleaved edges, and the resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface, a back surface, and sidewalls. An emitter region is in the substrate at the light-receiving surface of the substrate. The emitter region has sidewalls laterally retracted from the sidewalls of the substrate. A passivation layer is on the sidewalls of the emitter region.

There is provided a multi junction photovoltaic device comprising a first sub-cell comprising a photoactive region comprising a layer of perovskite material, a second sub-cell comprising a photoactive silicon absorber. and an intermediate region disposed between and connecting the first sub-cell and the second sub-cell. The intermediate region comprises an interconnect layer, the interconnect layer comprising a two-phase material comprising elongate (i.e. filament like) silicon nanocrystals embedded in a silicon oxide matrix.