A tandem junction photovoltaic cell has a first p-n junction with a first energy band gap, and a second p-n junction with a second energy band gap less than the first energy band gap. The junctions are separated by a quantum tunneling junction. The first p-n junction captures higher energy photons and allows lower energy photons to pass through and be captured by the second p-n junction. Quantum dots positioned within the first p-n junction promote quantum tunneling of charge carriers to increase the current generated by the first p-n junction and match the current of the second p-n junction for greater efficiency.

A method for producing a rear-side contact system for a silicon thin-film solar cell having pn junction formed from a silicon absorber layer and an emitter layer includes applying an organic insulation layer to the emitter layer; producing contact holes in the insulation layer as far as the absorber layer and the emitter layer; subsequently insulating the contact holes; subsequently applying a low-melting metal layer to form n and p contacts in the contact holes; separating the metal layer into n-contacting and p-contacting regions by laser-cutting; before applying the organic insulation layer to the emitter layer, applying a TCO layer; producing holes for contacts for the silicon absorber layer in the organic insulation; and subsequently selectively doping the produced holes for the contacts as far as the silicon absorber layer.

The present invention refers to a photovoltaic cell (1) comprising a heterojunction with a base layer (L4, L4′, L4″) made from an Aluminium-Ar-senic-basedalloy and an emitter layer (L3, L3′) made from an Indium-Phosphorous based alloy wherein the emitter layer (L3, L3′) has a thickness smaller than 100 nm and acts as a passivation layer to prevent oxidation of the base layer and reduces surface recombination (L4, L4′, L4″).

A photovoltaic device and method of manufacture of a photovoltaic device including an assembly of at least two photovoltaic cells; and a lamination material inserted between each photovoltaic cell, each photovoltaic cell including: two current output terminals; at least one photovoltaic junction; current collection buses; and connection strips extending from the current collection buses to the current output terminals, all the current output terminals being placed on a single surface of the photovoltaic device is provided.

An array substrate and manufacturing method thereof, an X-ray flat panel detector and an image pickup system are provided. The array substrate is divided into a plurality of detection units, and each of the detection units has a first electrode and a photoelectric conversion structure provided therein. The first electrode is disposed on a side of the photoelectric conversion structure opposite to a light incident side, and is electrically connected to the photoelectric conversion structure. A reflective layer that is electrically conductive is further included between the first electrode and the photoelectric conversion structure, and a surface of the reflective layer facing the photoelectric conversion structure is a reflection surface. The utilization rate of light can be enhanced by the array substrate as stated in embodiments of the invention, so that the detection accuracy of the X-ray flat panel detector is enhanced.

An optoelectronic device comprises microwires or nanowires, each of which comprises an alternation of passivated portions and of active portions, the active portions being surrounded with an active layer, where the active layers do not extend on the passivated portions.

A method of manufacturing solar cell includes providing a semiconductor substrate. A coating layer is then formed on a plurality of sides. Subsequently, an anti-reflective layer is formed on the layer. Finally at least one first electrode and at least one second electrode are formed. The first and second electrodes respectively and electrically connect to the second conductive amorphous substrate and the semiconductor substrate. The potential induced degradation is greatly reduced.

Image sensor pixels having low full-well capacity and high sensitivity for applications such as DIS, qDIS, single/multi bit QIS. Some embodiments provide an image sensor pixel architecture, comprises a transfer gate, a floating diffusion region both formed on a first surface of a semiconductor substrate and a buried-well vertically pinned photodiode having a charge accumulation/storage region disposed substantially or entirely beneath the transfer gate. Image sensor may also comprise an array of pixels, wherein each pixel comprises: a vertical bipolar structure including an emitter, base, collector configured for storing photocarriers in the base; and a reset transistor coupled to the base, configured to be completely reset of all free carriers using the reset transistor. The emitter may be configured as a pinning layer to facilitate full depletion of the base. Such image sensor pixels may have a full well capacity less than that giving good signal-to-noise ratio (SNR).

A solar cell can include a silicon substrate; a tunnel layer disposed on a first surface of the silicon substrate, the tunnel layer including a dielectric material; a polycrystalline silicon layer disposed on the tunnel layer; a dielectric layer disposed on the polycrystalline silicon layer; and an electrode penetrating through the dielectric layer and directly contacting with the polycrystalline silicon layer, wherein the polycrystalline silicon layer includes a metal crystal region positioned at a region where the polycrystalline silicon layer contacts the electrode, and wherein the metal crystal region includes a plurality of metal crystals, the plurality of metal crystals including a metal material same as a metal material included in the electrode.

In one or more embodiments, a solar cell may include: a silicon substrate, which is crystalline; a p-doped silicon oxide layer, which may be disposed on a first principal surface of the silicon substrate and may include phosphorus as an impurity; and an amorphous silicon layer, which may be disposed on the p-doped silicon oxide layer.