Y02E10/548

Solar cell

A solar cell of an embodiment has a first solar cell, a second solar cell, and an intermediate layer between the first and second solar cells. The first solar cell has a Si layer as a light absorbing layer. The second solar cell has as a light absorbing layer one of a group I-III-VI.sub.2 compound layer and a group I.sub.2-II-IV-VI.sub.4 compound layer. The intermediate layer has an n.sup.+-type Si sublayer and at least one selected from a p.sup.+-type Si sublayer, a metal compound sublayer, and a graphene sublayer. The metal compound sublayer is represented by MX where M denotes at least one type of element selected from Nb, Mo, Pd, Ta, W, and Pt and X denotes at least one type of element selected from S, Se, and Te.

Nanostructured units formed inside a silicon material and the manufacturing process to perform them therein

The invention bears on elementary nanoscale units nanostructured-formed inside a silicon material and the manufacturing process to implement them. Each elementary nanoscale unit is created by means of a limited displacement of two Si atoms outside a crystal elementary unit. A localized nanoscale transformation of the crystalline matter gets an unusual functionality by focusing in it a specific physical effect as is a highly useful additional set of electron energy levels that is optimized for the solar spectrum conversion to electricity. An adjusted energy set allows a low-energy secondary electron generation in a semiconductor, preferentially silicon, material for use especially in very-high efficiency all-silicon light-to-electricity converters. The manufacturing process to create such transformations in a semiconductor material bases on a local energy deposition like ion implantation or electron (γ,X) beam irradiation and suitable thermal treatment and is industrially easily available.

Photovoltaic device and method for manufacturing the same

A photovoltaic device is proposed comprising a silicon-based substrate (2) having a p-type or n-type doping, with an intrinsic buffer layer (4) situated on said substrate. A first silicon layer (6) of a first doping type is situated on predetermined regions (4a) of the intrinsic buffer layer. The first layer has interstices (5) between said predetermined regions (4a). The first silicon layer comprises at least partially a microcrystalline layer at its side away from the substrate. A microcrystalline silicon layer (8) of a second doping type is situated on said first silicon layer (6). A third silicon layer (10) of the second doping type is situated on said intrinsic buffer layer at the interstices, the third silicon layer being amorphous at its side facing said silicon-based substrate and comprising an at least partially microcrystalline layer portion to the side away from the intrinsic buffer layer.

Method for manufacturing perovskite silicon tandem solar cell
11251324 · 2022-02-15 · ·

The present disclosure relates to a method for manufacturing a monolithic tandem solar cell in which a perovskite solar cell is laminated and bonded on a silicon solar cell. According to the present disclosure, a first microporous precursor thin film is formed through a sputtering method on a substrate having an unevenly structured texture and then a halide thin film is formed on the first microporous precursor thin film to form a perovskite absorption layer, whereby light reflectance can be reduced and a path of light can be increased, and accordingly a light absorption rate can be increased.

Method of stabilizing hydrogenated amorphous silicon and amorphous hydrogenated silicon alloys

A method of forming a semiconductor material of a photovoltaic device that includes providing a surface of a hydrogenated amorphous silicon containing material, and annealing the hydrogenated amorphous silicon containing material in a deuterium containing atmosphere. Deuterium from the deuterium-containing atmosphere is introduced to the lattice of the hydrogenated amorphous silicon containing material through the surface of the hydrogenated amorphous silicon containing material. In some embodiments, the deuterium that is introduced to the lattice of the hydrogenated amorphous silicon containing material increases the stability of the hydrogenated amorphous silicon containing material.

ELECTROCHEMICAL REACTION DEVICE

An electrochemical reaction device, includes: an electrolytic solution tank including a first storage part to store a first electrolytic solution containing carbon dioxide, and a second storage part to store a second electrolytic solution containing water; a reduction electrode disposed in the first storing part; an oxidation electrode disposed in the second storing part; a porous body disposed in the first storing part; and a flow path connecting the porous body and an outside of the electrolytic solution tank to supply gas containing carbon dioxide to the porous body.

Screen printing electrical contacts to nanowire areas

A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700 C, 750 C, 800 C, or 850 C.

High efficiency solar cells with quantum dots for IR pumping
09768334 · 2017-09-19 ·

A photovoltaic (PV) device including: (a) a p-n junction having (i) p-type silicon substrate with an Al-doped P++ surface, (ii) a wide band intrinsic AlP region having a first side formed on the Al-doped P++ surface of the silicon substrate, and (iii) an Si-doped n++ surface formed on a second side of the AlP region that is opposite to the first side; (b) charged quantum dots formed on the Si-doped n++ surface of the p-n junction and optionally (c) an electrode connected to each side of the device; wherein the charged quantum dots are operatively linked to the p-n junction to enable electrons harvested from IR photons absorbed by the quantum dots to be harvested with electrons harvested from photons absorbed by the p-n junction and wherein the wide band intrinsic AlP region is configured to inhibit leakage of hole current. Also, a method for forming the PV device.

Quantum dot channel (QDC) quantum dot gate transistors, memories and other devices
11251270 · 2022-02-15 ·

This invention includes multiple quantum well and quantum dot channel FETs, which can process multi-state/multi-bit logic, and multibit-bit inverters configured as static random-access memories (SRAMs). SRAMs can be implemented as flip-flops and registers. In addition, multiple quantum well and quantum dot channel structures are configured to function as multi-bit high-speed quantum dot (QD) random access memories (NVRAMs). Multi-bit Logic, SRAMs and QD-NVRAMs are spatially located on a chip, depending on the application, to provide a low-power consumption and high-speed hardware platform. The multi-bit logic, SRAM and register, and QD-NVRAM are implemented on a single chip in a CMOS-like platform for applications including artificial intelligence (AI) and machine learning.

SOLAR CELL
20220045228 · 2022-02-10 · ·

A solar cell that capable of improving light utilization efficiency is disclosed. The solar cell comprises I-VII compound photovoltaic layer, silicon photovoltaic layer, first electrode and second electrode. The I-VII compound photovoltaic layer comprises first and second type I-VII compound layers. The first and second type I-VII compound layer have first and second type impurities, respectively. The second type I-VII compound layer is disposed under the first type I-VII compound layer. The silicon photovoltaic layer comprises first and second type silicon layers. The first and second type silicon layers have first and second type dopants, respectively. The first type and second type silicon layers are disposed under the second type I-VII compound layer and the first type silicon layer, respectively. The first and second electrodes are formed under the second type silicon layer and on a portion of the first type I-VII compound layer, respectively.