Patent classifications
Y10T29/49124
LED lamp and method for manufacturing the same
A light emitting diode (LED) lamp includes a lamp housing formed of a pair of housing members connected to each other in a horizontal direction. A printed circuit board (PCB) is detachably connected to an inside of the lamp housing, and includes at least one LED mounted to one surface of the PCB. A power supply unit (PSU) is electrically connected with the PCB in the lamp housing to supply power to the PCB.
Mask structure and manufacturing method thereof
A mask structure and a manufacturing method of the mask structure are provided. The mask structure includes a transparent substrate, a patterned metal layer, and a plurality of microlens structures. The patterned metal layer is disposed on the transparent substrate and exposing a portion of the transparent substrate. The microlens structures are disposed on the transparent substrate exposed by a portion of the patterned metal layer and being in contact with the portion of the patterned metal layer.
Method for manufacturing a circuit having a lamination layer using laser direct structuring process
A method of forming a multi-layer circuit on a curved substrate includes forming, by a laser direct structuring process, a first layer of the multi-layer circuit on a first surface of the curved substrate. The method includes applying a first layer of paint to the first layer of the multi-layer circuit. The method includes forming, by the laser direct structuring process, a second layer of the multi-layer circuit on the first layer of the paint and electrically coupled to the first layer of the multi-layer circuit. The method includes applying a second layer of paint over the second layer of the multi-layer circuit and forming, by the laser direct structuring process, a third layer of the multi-layer circuit on the second layer of the paint and electrically coupled to the second layer of the multi-layer circuit.
OFFSET INTERPOSERS FOR LARGE-BOTTOM PACKAGES AND LARGE-DIE PACKAGE-ON-PACKAGE STRUCTURES
An offset interposer includes a land side including land-side ball-grid array (BGA) and a package-on-package (POP) side including a POP-side BGA. The land-side BGA includes two adjacent, spaced-apart land-side pads, and the POP-side BGA includes two adjacent, spaced-apart POP-side pads that are coupled to the respective two land-side BGA pads through the offset interposer. The land-side BGA is configured to interface with a first-level interconnect. The POP-side BGA is configured to interface with a POP substrate. Each of the two land-side pads has a different footprint than the respective two POP-side pads.
Method for manufacturing a circuit having a lamination layer using laser direct structuring process
The present disclosure relates to the method of manufacturing circuit having lamination layer using LDS (Laser Direct Structuring) to ease the application on surface structure for applied product of various electronic circuit and particularly, in which can form circuit structure of single-layer to multiple-layer on the surface of injection-molded substrate in the shape of plane or curved surface, metal product, glasses, ceramic, rubber or other material.
Electrochromic window fabrication methods
Methods of manufacturing electrochromic windows are described. An electrochromic device is fabricated to substantially cover a glass sheet, for example float glass, and a cutting pattern is defined based on one or more low-defectivity areas in the device from which one or more electrochromic panes are cut. Laser scribes and/or bus bars may be added prior to cutting the panes or after. Edge deletion can also be performed prior to or after cutting the electrochromic panes from the glass sheet. Insulated glass units (IGUs) are fabricated from the electrochromic panes and optionally one or more of the panes of the IGU are strengthened.
Softening nerve cuff electrodes
A nerve cuff electrode device comprising a cuff body having a smart memory polymer layer with a rigid configuration at room temperature and a softened configuration at about 37° C. The smart memory polymer layer has a trained curved region with a radius of curvature of about 3000 microns or less. A plurality of thin film electrodes located on the smart memory polymer layer. The thin film electrodes include discrete titanium nitride electrode sites that are located in the trained curved region. An exposed surface of each of the discrete titanium nitride electrode sites has a charge injection capacity of about 0.1 mC/cm.sup.2 or greater. Methods or manufacturing and using the device are also disclosed.
Offset interposers for large-bottom packages and large-die package-on-package structures
An offset interposer includes a land side including land-side ball-grid array (BGA) and a package-on-package (POP) side including a POP-side BGA. The land-side BGA includes two adjacent, spaced-apart land-side pads, and the POP-side BGA includes two adjacent, spaced-apart POP-side pads that are coupled to the respective two land-side BGA pads through the offset interposer. The land-side BGA is configured to interface with a first-level interconnect. The POP-side BGA is configured to interface with a POP substrate. Each of the two land-side pads has a different footprint than the respective two POP-side pads.
Method for assembling a camera for a vision system of a vehicle
A method for assembling a camera suitable for use for a vision system of a vehicle includes providing a circuit board having first and second sides separated by a thickness dimension of the circuit board. An imager is disposed at the first side of the circuit board and solder pads are disposed at the second side of the circuit board. The solder pads are in electrical connection with circuitry of the circuit board. A coaxial connector is aligned at the solder pads at the second side of the circuit board. The coaxial connector is soldered at the second side of the circuit board via melting the solder paste at the solder pads.
OFFSET INTERPOSERS FOR LARGE-BOTTOM PACKAGES AND LARGE-DIE PACKAGE-ON-PACKAGE STRUCTURES
An offset interposer includes a land side including land-side ball-grid array (BGA) and a package-on-package (POP) side including a POP-side BGA. The land-side BGA includes two adjacent, spaced-apart land-side pads, and the POP-side BGA includes two adjacent, spaced-apart POP-side pads that are coupled to the respective two land-side BGA pads through the offset interposer. The land-side BGA is configured to interface with a first-level interconnect. The POP-side BGA is configured to interface with a POP substrate. Each of the two land-side pads has a different footprint than the respective two POP-side pads.