Y10T29/49124

Manufacturing a product using a soldering process

A system for manufacturing a product includes a mating connector connected to solder pins to provide an electrical conducting path, the solder pins being aligned against solder pads so that each solder pin is thermally and electrically connected to its corresponding solder pad by a solder paste bead. The system also includes a controller to adjust electrical resistive heating of a solder paste bead during a soldering process according to a temperature of the solder paste bead. A method of manufacturing a product includes aligning the solder pins against the solder pads, connecting the mating connector to the solder pins, and heating a solder paste bead by an electrical resistive heating, the solder paste bead undergoing a soldering process, where a temperature of the solder paste bead is being evaluated and the electrical resistive heating is adjusted according to the temperature of the solder paste bead.

Low-power biasing networks for superconducting integrated circuits

A superconducting integrated circuit, comprising a plurality of superconducting circuit elements, each having a variation in operating voltage over time; a common power line; and a plurality of bias circuits, each connected to the common power line, and to a respective superconducting circuit element, wherein each respective bias circuit is superconducting during at least one time portion of the operation of a respective superconducting circuit element, and is configured to supply the variation in operating voltage over time to the respective superconducting circuit element.

Methods and Apparatus for Transmission Lines in Packages
20210082848 · 2021-03-18 ·

Methods and apparatus for forming a semiconductor device package with a transmission line using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top device and a bottom device. A signal transmission line may be formed using a micro-bump line above a bottom device. A ground plane may be formed using a redistribution layer (RDL) within the bottom device, or using additional micro-bump lines. The RDL formed ground plane may comprise open slots. There may be RDLs at the bottom device and the top device above and below the micro-bump lines to form parts of the ground planes.

Integrated passive circuit elements for sensing devices

Capacitive sensing devices are provided that include a sensing pattern of conductive traces disposed upon the surface of a substrate and a first passive circuit element that includes a metallic conductor disposed upon the same surface of the substrate. In some embodiments, the first passive circuit element is a component of an electronic circuit that can be, for example, a low pass filter. Provided capacitive sensing devices are useful, for example, when incorporated into projected touch screen display panels for use on electronic devices.

Optic for a light source

Optics over a light source, such as, but not limited to, an LED on a circuit board. The optic does not entirely encapsulate the LED but rather includes an inner surface such that an air gap exists between the optic and the LED. The optic may include a lens and may conform to the shape of the circuit board.

OFFSET INTERPOSERS FOR LARGE-BOTTOM PACKAGES AND LARGE-DIE PACKAGE-ON-PACKAGE STRUCTURES

An offset interposer includes a land side including land-side ball-grid array (BGA) and a package-on-package (POP) side including a POP-side BGA. The land-side BGA includes two adjacent, spaced-apart land-side pads, and the POP-side BGA includes two adjacent, spaced-apart POP-side pads that are coupled to the respective two land-side BGA pads through the offset interposer. The land-side BGA is configured to interface with a first-level interconnect. The POP-side BGA is configured to interface with a POP substrate. Each of the two land-side pads has a different footprint than the respective two POP-side pads.

ELECTROCHROMIC WINDOW FABRICATION METHODS

Methods of manufacturing electrochromic windows are described. An electrochromic device is fabricated to substantially cover a glass sheet, for example float glass, and a cutting pattern is defined based on one or more low-defectivity areas in the device from which one or more electrochromic panes are cut. Laser scribes and/or bus bars may be added prior to cutting the panes or after. Edge deletion can also be performed prior to or after cutting the electrochromic panes from the glass sheet. Insulated glass units (IGUs) are fabricated from the electrochromic panes and optionally one or more of the panes of the IGU are strengthened.

Single layer low cost wafer level packaging for SFF SiP
10867961 · 2020-12-15 · ·

In one embodiment of the invention, a system in package (SiP) is described which includes a plurality of device components with different form factors embedded within a molding compound layer. A surface for each of the device components is coplanar with a surface of the molding compound layer, and a single redistribution layer (RDL) formed on the coplanar surfaces of the molding compound layer and the plurality of device components. An active device die is electrically bonded to the single RDL directly vertically adjacent the plurality of device components. In an embodiment, the SiP is electrically connected to a circuit board with the active device die between the single RDL and the circuit board. In an embodiment, the SiP is electrically connected to a circuit board with the active device die over the single RDL and the circuit board.

Methods and apparatus for transmission lines in packages

Methods and apparatus for forming a semiconductor device package with a transmission line using a micro-bump layer are disclosed. The micro-bump layer may comprise micro-bumps and micro-bump lines, formed between a top device and a bottom device. A signal transmission line may be formed using a micro-bump line above a bottom device. A ground plane may be formed using a redistribution layer (RDL) within the bottom device, or using additional micro-bump lines. The RDL formed ground plane may comprise open slots. There may be RDLs at the bottom device and the top device above and below the micro-bump lines to form parts of the ground planes.

Locking device with configurable electrical connector key and internal circuit board for electronic door locks
10829959 · 2020-11-10 · ·

Locks, systems and methods of monitoring a lock, the lock having a hub with a slot rotatable by a handle to open and close a latchbolt. A locking member is moveable into and out of engagement with the hub slot to prevent and permit movement of the hub and latchbolt. A sensor on the lock, adjacent the hub and locking member, monitors a moving lock component. The sensor may sense the position of the locking member in or out of engagement with the hub slot. The sensor may be a reed switch actuated by a magnet on the moving lock component. The lock may further include a magnet mounted on the hub and the sensor may comprise a reed switch capable of being actuated by the magnet on the hub. The lock and system may include an external control unit having an alarm for controlling operation of the lock.