A material with a nanotexture comprising structures extending from a substrate. The structures are modified by coating the nanotexture with a protective coating and partially removing the coating, exposing a portion of the structure for functionalization.

A master tool is provided with an ink pattern on a major surface thereof. The ink pattern is formed by a screen printing process. A stamp-making material is applied to the major surface of the master tool to form a stamp having a stamping pattern being negative to the ink pattern of the master tool. The stamping pattern is inked with an ink composition and contacted with a metalized surface to form a printed pattern on a metalized surface of a substrate according to the stamping pattern. Using the printed pattern as an etching mask, the metalized surface is etched to form electrically conductive traces on the substrate.

A method for forming a functionalised assembly guide intended for the self-assembly of a block copolymer by graphoepitaxy, includes forming on the surface of a substrate a neutralisation layer made of a first material having a first neutral chemical affinity with regard to the block copolymer; forming on the neutralisation layer a first mask including at least one recess; depositing on the neutralisation layer a second material having a second preferential chemical affinity for one of the copolymer blocks, in such a way as to fill the at least one recess of the first mask; and selectively etching the first mask relative to the first and second materials, thereby forming at least one guide pattern made of the second material arranged on the neutralisation layer.

This application relates to a method of forming nano-patterns on a substrate comprising the step of forming a plurality of nanostructures on a dielectric substrate, wherein the nanostructures are dimensioned or spaced apart from each other by a scaling factor of the dielectric substrate with reference to a silicon substrate. There is also provided a method of forming a nano-patterned substrate comprising the step of forming a plurality of nanostructures on a dielectric substrate, wherein said dielectric substrate comprises an anti-reflectance layer disposed on a base substrate. There is also provided a method of forming a nano-patterned substrate comprising the steps of forming a plurality of nano structures on a dielectric substrate, wherein the dielectric substrate comprises an anti-reflectance layer disposed on a base substrate, wherein the nanostructures comprise a dielectric material, and wherein the nanostructures are dimensioned or spaced apart from each other by a scaling factor of the dielectric material with reference to a silicon substrate.

A MEMS device and a method of forming the same. A disclosed method includes: providing a silicon substrate layer, a buried oxide layer and a device silicon layer; using a microfabrication process to pattern a set of device features on the device silicon layer including a shuttle mass and an anchor frame; removing the silicon substrate layer and buried oxide below the shuttle mass; placing a shadow mask on a surface of the device silicon layer, wherein the shadow mask has an microscale opening to expose at least one device feature; and forming a nanoscale stopper on a sidewall of the at least one device feature by depositing a deposition material through the opening in a controlled manner.

A method of manufacturing a polarizer includes forming a first layer on a base substrate, forming a first partition wall layer on the first layer, forming a second partition wall layer on the first partition wall, forming a plurality of first partition wall patterns and a plurality of second partition walls disposed on the first partition wall patterns by etching the first partition wall and the second partition wall at the same time, forming a block copolymer layer on the first layer on which the plurality of first partition wall patterns are formed, forming a plurality of fine patterns from the block copolymer layer, and patterning the first layer using the fine patterns and the second partition wall patterns as a mask.

Embodiments described herein relate to the concept and designs of a polymer-based thermal ground plane. In accordance with one embodiment, a polymer is utilized as the material to fabricate the thermal ground plane. Other embodiments include am optimized wicking structure design utilizing two arrays of micropillars, use of lithography-based microfabrication of the TGP using copper/polymer processing, micro-posts, throttled releasing holes embedded in the micro-posts, atomic layer deposition (ALD) hydrophilic coating, throttled fluid charging structure and sealing method, defect-free ALD hermetic coating, and compliant structural design.

A method of reactive ion etching a substrate 46 to form at least a first and a second etched feature (42, 44) is disclosed. The first etched feature (42) has a greater aspect ratio (depth:width) than the second etched feature (44). In a first etching stage the substrate (46) is etched so as to etch only said first feature (42) to a predetermined depth. Thereafter in a second etching stage, the substrate (46) is etched so as to etch both said first and said second features (42, 44) to a respective depth. A mask (40) may be applied to define apertures corresponding in shape to the features (42, 44). The region of the substrate (46) in which the second etched feature (44) is to be produced is selectively masked with a second maskant (50) during the first etching stage, The second maskant (50) is then removed prior to the second etching stage.

A process for positive microcontact printing, including inking a patterned mold with a thiol; contacting the mold with a metal surface of a substrate; backfilling the metal surface with a solution containing an aromatic amine to form a backfilling layer; etching the metal surface of the substrate; and rinsing the substrate to remove the backfilling layer.

The present disclosure includes structures and methods of forming structures for restricting out-of-plane travel. One example of forming such structures includes providing a first wafer 100, 220 comprising a bond layer of a particular thickness 101, 221 on a surface of a substrate material 105, 225, removing the bond layer 101, 221 in a first area 103-1, 103-2, 223 to expose the surface of the substrate material 105, 225, applying a mask to at least a portion of a remaining bond layer 109-1, 109-4, 229-1, 229-3 and a portion of the exposed surface of the substrate material in the first area 109-2, 109-3, 229-2 to form a second area exposed on the surface of the substrate material 105, 225, etching the second area to form a cavity 110, 230 in the substrate material 105, 225 and the bond layer 101, 221, and forming by the etching, in the cavity 110, 230, a structure 113-1, 113-2, 233 for restricting out-of-plane travel, where the structure 113-1, 113-2, 233 has a particular height from a bottom of the cavity 115, 235 determined by the particular thickness of the bond layer 101, 221.