B82B1/001

Forming nanoscale pores in a semiconductor structure utilizing nanotubes as a sacrificial template

A method of forming a semiconductor structure includes forming two or more catalyst nanoparticles from a metal layer disposed over a substrate in two or more openings of a hard mask patterned over the metal layer. The method also includes growing two or more carbon nanotubes using the catalyst nanoparticles, and removing the carbon nanotubes to form two or more nanoscale pores. The two or more nanoscale pores may be circular nanoscale pores having a substantially uniform diameter. The two or more openings in the hard mask may have non-uniform size, and the substantially uniform diameter of the two or more nanopores may be controlled by a size of the carbon nanotubes.

Systems and methods for genome mapping

A system for molecular mapping includes a semiconductor substrate defining a reservoir to receive a sample of molecules and a nanofluidic channel in fluid communication with the reservoir. The system also includes a plurality of electrodes, in electrical communication with the nanofluidic channel, to electrophoretically trap the sample of molecules in the nanofluidic channel. At least one avalanche photodiode is fabricated in the semiconductor substrate and disposed within an optical near-field of the nanofluidic channel to detect fluorescence emission from at least one molecule in the sample of molecules.

Nanotube particle device and method for using the same

A nanotube particle device for two dimensional and three dimensional printing or additive/subtractive manufacturing. The nanotube particle device comprising a nanotube, a particle shooter, a positioning mechanism, and a detection sensor. The particle shooter shoots a particle down the nanotube towards a target, the detection sensor senses the collision of the particle with the target, and the positioning mechanism re-adjusts the positioning of the nanotube based on the results of the collision. A method for aiming the particle shooter and additive/subtractive manufacturing are also disclosed and described.

Quantum dot glass plate and manufacturing method thereof

A quantum dot glass plate includes a first glass substrate, a second glass substrate correspondingly parallel with the first glass substrate, and a glue layer arranged between the first glass substrate and the second glass substrate, where the glue layer includes at least one glue frame arranged in a line. A shape of the first glass substrate is same as a shape as the second glass substrate, and edges of the glue layer correspond to edges of the first glass substrate and the second glass substrate.

METHOD TO REDUCE PORE DIAMETER USING ATOMIC LAYER DEPOSITION AND ETCHING
20200180950 · 2020-06-11 ·

Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays of well-controlled, solid-state nanopores by a cyclic process including atomic layer deposition (ALD), or chemical vapor deposition (CVD), and etching. One or more features are formed in a thin film deposited on a topside of a substrate. A dielectric material is deposited over the substrate having the one or more features in the thin film. An etching process is then used to etch a portion of the dielectric material deposited over the substrate having the one or more features in the thin film. The dielectric material deposition and etching processes are optionally repeated to reduce the size of the features until a well-controlled nanopore is formed through the thin film on the substrate.

Method to reduce pore diameter using atomic layer deposition and etching

Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays of well-controlled, solid-state nanopores by a cyclic process including atomic layer deposition (ALD), or chemical vapor deposition (CVD), and etching. One or more features are formed in a thin film deposited on a topside of a substrate. A dielectric material is deposited over the substrate having the one or more features in the thin film. An etching process is then used to etch a portion of the dielectric material deposited over the substrate having the one or more features in the thin film. The dielectric material deposition and etching processes are optionally repeated to reduce the size of the features until a well-controlled nanopore is formed through the thin film on the substrate.

METHOD OF FORMING A NANOPORE AND RESULTING STRUCTURE
20200088713 · 2020-03-19 ·

Methods are provided for manufacturing well-controlled, solid-state nanopores in close proximity and arrays thereof. In one embodiment, a plurality of wells and one or more channels are formed in a substrate. Each of the wells is adjacent a channel. A portion of a sidewall of each well is exposed. The portion of exposed sidewall is nearest to the adjacent channel. The portion of the exposed sidewall of each well is laterally etched towards the adjacent channel. A nanopore is formed connecting the wells to an adjacent channel.

Self-aligned nanotips with tapered vertical sidewalls

A method of forming a semiconductor structure includes forming a substrate, forming an anchor layer, and forming one or more self-aligned nanotip pillar pairs disposed vertically between the substrate and the anchor layer. A given one of the nanotip pillar pairs comprises a bottom nanotip pillar and a top nanotip pillar, the bottom nanotip pillar comprising a base portion disposed on a top surface of the substrate and the top nanotip pillar comprising a base portion disposed in the anchor layer. The bottom nanotip pillar and the top nanotip pillar comprise sidewalls that taper to points as distance from the respective base portions increases.

Analytical nanoscope on a chip for sub-optical resolution imaging

An imaging device and method of using is provided that requires no traditional optics but uses an addressable array of vertically oriented carbon nanotubes. The technique relies on the ability to reduce the nearest neighbor spacing between the carbon nanotubes to less than the wavelength of light used in traditional optical microscopes. The nanoscope can have a resolution of less than 100 nm. Electrophoresis deposition can be used to direct the assembly of the carbon nanotubes onto interconnects in an integrated circuit, which could be used to address the array. The device is portable, compact, and does not utilize complicated components. It also derives spatially resolved dielectric and chemical properties of a sample to be imaged.

Plasmon Resonance Imaging Apparatus Having Metal-Insulator-Metal Nanocups

Provided are plasmon resonance imaging devices having metal-insulator-metal nanocups and methods of use thereof.