H10F71/1276

Light Extraction from Optoelectronic Device

An optoelectronic device configured for improved light extraction through a region of the device other than the substrate is described. A group III nitride semiconductor layer of a first polarity is located on the substrate and an active region can be located on the group III nitride semiconductor layer. A group III nitride semiconductor layer of a second polarity, different from the first polarity, can located adjacent to the active region. A first contact can directly contact the group III nitride semiconductor layer of the first polarity and a second contact can directly contact the group III nitride semiconductor layer of the second polarity. Each of the first and second contacts can include a plurality of openings extending entirely there through and the first and second contacts can form a photonic crystal structure. Some or all of the group III nitride semiconductor layers can be located in nanostructures.

Optoelectronic Device with a Nanowire Semiconductor Layer

A heterostructure for use in an electronic or optoelectronic device is provided. The heterostructure includes one or more semiconductor layers containing columnar nanostructures (e.g., nanowires). The nanowire semiconductor layer can include sub-layers of varying composition, at least one of which is an active layer that can include quantum wells and barriers. A heterostructure can include n-type and p-type semiconductor contact layers adjacent to the nanowire semiconductor layer containing the active layer.

LATTICE MATCHABLE ALLOY FOR SOLAR CELLS

An alloy composition for a subcell of a solar cell is provided that has a bandgap of at least 0.9 eV, namely, Ga.sub.1-xIn.sub.xN.sub.yAs.sub.1-y-zSb.sub.z with a low antimony (Sb) content and with enhanced indium (In) content and enhanced nitrogen (N) content, achieving substantial lattice matching to GaAs and Ge substrates and providing both high short circuit currents and high open circuit voltages in GaInNAsSb subcells for multijunction solar cells. The composition ranges for Ga.sub.1-xIn.sub.xN.sub.yAs.sub.1-y-zSb.sub.z are 0.07x0.18, 0.025y0.04 and 0.001z0.03.

Contact Configuration for Optoelectronic Device

An optoelectronic device with a multi-layer contact is described. The optoelectronic device can include a n-type semiconductor layer having a surface. A mesa can be located over a first portion of the surface of the n-type semiconductor layer and have a mesa boundary. A n-type contact region can be located over a second portion of the surface of the n-type semiconductor contact layer entirely distinct from the first portion, and be at least partially defined by the mesa boundary. A first n-type metallic contact layer can be located over at least a portion of the n-type contact region in proximity of the mesa boundary, where the first n-type metallic contact layer forms an ohmic contact with the n-type semiconductor layer. A second n-type metallic contact layer can be located over a second portion of the n-type contact region, where the second n-type metallic contact layer is formed of a reflective metallic material.

Optoelectronics and CMOS integration on GOI substrate

A method of forming an optoelectronic device and a silicon device on a single chip. The method may include; forming a stack of layers on a substrate in a first and second region, the stack of layers include a semiconductor layer, a first insulator layer, a waveguide, a second insulator layer, and a device base layer; forming the device on the device base layer in the second region; forming a device insulator layer on the device and on the device base layer in the second region; and forming the optoelectronic device in the first region, the optoelectronic device has a bottom cladding layer, an active region, and a top cladding layer, wherein the bottom cladding layer is on the semiconductor layer, the active region is on the bottom cladding layer, and the top cladding layer is on the active region.

PHOTOVOLTAICS ON SILICON

Structures including crystalline material disposed in openings defined in a non-crystalline mask layer disposed over a substrate. A photovoltaic cell may be disposed above the crystalline material.

Four-Junction Solar Cell and Fabrication Method

A method of fabricating a four-junction solar cell includes: forming a first epitaxial structure comprising first and second subcells and a cover layer over a first substrate through a forward epitaxial growth, and forming a second epitaxial structure comprising third and fourth subcells over the second substrate; forming a groove and a metal bonding layer; forming a groove on the cover layer surface of the first epitaxial structure and the substrate back surface of the second epitaxial structure, and depositing a metal bonding layer in the groove; and bonding the first epitaxial structure and the second epitaxial structure; bonding the cover layer surface of the first epitaxial structure and the substrate back surface of the second epitaxial structure, ensuring that the metal bonding layers are aligned to each other to realize dual bonding between the metal bonding layers and between the semiconductors through high temperature and high pressure treatment.

Method for Producing an Optoelectronic Semiconductor Component and Optoelectronic Semiconductor Component
20170062661 · 2017-03-02 ·

A method for producing an optoelectronic semiconductor component having a plurality of image points and an optoelectronic component are disclosed. In an embodiment the method includes providing a semiconductor layer sequence including an n-conducting semiconductor layer, an active zone, and a p-conducting semiconductor layer; applying a first layer sequence, wherein the first layer sequence is divided into a plurality of regions which are arranged laterally spaced with respect to each other on a top surface of the p-conducting semiconductor layer; c) applying a second insulating layer; partially removing the p-conducting semiconductor layer and the active zone, in such a way that the n-conducting semiconductor layer is exposed at points and the p-conducting semiconductor layer is divided into individual regions which are laterally spaced with respect to each other, wherein each of the regions comprises a part of the p-conducting semiconductor layer and a part of the active zone.

Space vehicles including multijunction metamorphic solar cells
12249667 · 2025-03-11 · ·

A plurality of space vehicles forming a satellite constellation, each space vehicle comprising a housing having a first side and an opposite side, and an axis; a first elongated, rectangular sheet including an array of transducer devices including multijunction solar cells mounted on, and extending from a surface of the first side of the housing, and a second elongated rectangular sheet including an array of transducer devices including multijunction solar cells mounted on and extending from a surface of the second side of the housing in a direction opposite to that of the first elongated rectangular sheet, wherein the selection of the composition of the subcells and their band gap of the multijunction solar cells maximizes the efficiency of the solar cell at the end-of-life EOL in the application of one of (i) a low earth orbit (LEO) satellite that typically experiences radiation equivalent to 510.sup.14 electron fluence per square centimeter (e/cm.sup.2) over a five year EOL, or (ii) a geosynchronous earth orbit (GEO) satellite that typically experiences radiation in the range of 510.sup.14 e/cm.sup.2 to 110.sup.15 e/cm.sup.2 over a fifteen year EOL, with the efficiency of the multijunction solar cells being less at the beginning-of-life (BOL) than the end-of-life (EOL).

Compound semiconductor device and method of fabricating the same

A compound semiconductor device is disclosed. The compound semiconductor device comprises a substrate having at least a first doped region and at least a second doped region; a semiconductor layer disposed on the substrate; and a buffer layer located between said substrate and said semiconductor layer; wherein doping conditions of said first doped region and said second doped region are different from each other; wherein said semiconductor layer has different thicknesses on locations corresponding to said first doped region and said second doped region respectively, and is formed as a structure with difference in thickness.