An optoelectronic device includes an etched body comprising a buried metal contact layer on a top surface of a semiconductor structure, which comprises one or more semiconductor layers. The buried metal contact layer includes an arrangement of holes therein. A plurality of nanopillar structures protrude from the top surface of the semiconductor structure and pass through the arrangement of holes. Each nanopillar structure is surrounded at a base thereof by a portion of the buried metal contact layer. When the etched body is exposed to incident radiation having a wavelength in the range from about 300 nm to about 10 microns, at least about 50% of the incident radiation is transmitted through the etched body at a peak transmission wavelength .sub.max.

Embodiments generally relate to optoelectronic devices and more specifically, to textured layers in optoelectronic devices. In one embodiment, a method for providing a textured layer in an optoelectronic device includes depositing a first layer of a first material and depositing an island layer of a second material on the first layer. Depositing the island layer includes forming one or more islands of the second material to provide at least one textured surface of the island layer, where the textured surface is operative to cause scattering of light.

Fast neutron detectors using nuclear reactions within semiconductor material, glass, or other material. Some versions used doped versions of the materials. Some versions use dopants selected from Ba, As, Br, C, Ce, Cl, Co, Cu, F, Ga, Ge, In, Cd, Te, Al, P, K, La, Mo, Nd, O, Os, Pr, S, Se, Si, Sn, Sr, Ti, Tl, V, Zn, and Zr. Some versions have filters or coatings deposited on windows into the detector. Coatings are selected from titanium oxide, zinc oxide, tin oxide, copper indium gadolinium selenide, cadmium telluride, cadmium tin oxide, perovskite photovoltaic, Si, GaAs, AlP, Ge.

Fast neutron detectors using nuclear reactions within semiconductor material, glass, or other material. Some versions used doped versions of the materials. Some versions use dopants selected from Ba, As, Br, C, Ce, Cl, Co, Cu, F, Ga, Ge, In, Cd, Te, Al, P, K, La, Mo, Nd, O, Os, Pr, S, Se, Si, Sn, Sr, Ti, Tl, V, Zn, and Zr. Some versions have filters or coatings deposited on windows into the detector. Coatings are selected from titanium oxide, zinc oxide, tin oxide, copper indium gadolinium selenide, cadmium telluride, cadmium tin oxide, perovskite photovoltaic, Si, GaAs, AlP, Ge.

A photovoltaic (PV) solar panel, made of many micro-PV cells, where each micro-PV cell has its own integrated, monolithic bypass diode. Each micro-PV cell is a multi-junction solar cell that is approximately 1 cm on a side. An array of approximately fifty micro-PV cells, all connected in series, makes up a single PV device, which generates 90-100 V at a low current. A PV solar panel includes multiple strings of these PV devices, connected in parallel, which generates a high photocurrent at 90-100 V. The multi-junction micro-PV cells can be made of stacked layers of Ge, GaAs, and InGaP PN.

A multijunction solar cell including an upper first solar subcell having an emitter and base layers forming a photoelectric junction; a second solar subcell disposed under and adjacent to the upper first solar subcell, and having an emitter and base layers forming a photoelectric junction; and a third solar subcell disposed under and adjacent to the second solar subcell and having an emitter and base layers forming a photoelectric junction; wherein at least one of the base and emitter layers of at least a particular solar subcell from among the upper first solar subcell, the second solar subcell, and the third solar subcell has a graded band gap throughout at least a portion of thickness of its active layer adjacent to the photoelectric junction and being in a range of 20 to 300 MeV greater than a band gap in the active layer in both the emitter layer and the base layer spaced away from the photoelectric junction.

A multijunction solar cell including an upper first solar subcell having an emitter and base layers forming a photoelectric junction; a second solar subcell disposed under and adjacent to the upper first solar subcell, and having an emitter and base layers forming a photoelectric junction; and a third solar subcell disposed under and adjacent to the second solar subcell and having an emitter and base layers forming a photoelectric junction; wherein at least one of the base and emitter layers of at least a particular solar subcell from among the upper first solar subcell, the second solar subcell, and the third solar subcell has a graded band gap throughout at least a portion of thickness of its active layer adjacent to the photoelectric junction and being in a range of 20 to 300 MeV greater than a band gap in the active layer in both the emitter layer and the base layer spaced away from the photoelectric junction.

Systems and methods of non-epitaxial high Schottky barriers heterojunction solar cells are described. The high Schottky barriers heterojunction solar cells are formed using non-epitaxial methods to reduce fabrication costs and improve scalability.

Systems and methods of non-epitaxial high Schottky barriers heterojunction solar cells are described. The high Schottky barriers heterojunction solar cells are formed using non-epitaxial methods to reduce fabrication costs and improve scalability.

Provided is a method for manufacturing a solar cell, including: providing a substrate having a first surface and a second surface opposite to each other forming a first doped layer on the second surface and concurrently forming a second doped layer on a target doped dielectric layer; patterning the second doped layer, including removing portions of the second doped layer; etching away the portion of the target doped dielectric layer over the first region; etching away a portion of the target doped semiconductor layer over the first region, and etching away a portion of the second doped layer over the second region; and etching away the portion of the target doped dielectric layer over the second region, a portion of the target doped semiconductor layer over the second region being reserved as a doped semiconductor portion. The respective first regions and the respective second regions are alternatingly distributed.