A radiation image-pickup device includes: a plurality of pixels configured to generate signal charge based on radiation; and a field effect transistor used to read out the signal charge from the plurality of pixels. The transistor includes a first silicon oxide film, a semiconductor layer, and a second silicon oxide film laminated in order from a substrate side, the semiconductor layer including an active layer, and a first gate electrode disposed to face the semiconductor layer, with the first or the second silicon oxide film interposed therebetween, and the first or the second silicon oxide film or both include an impurity element.

An image sensor pixel includes a photodiode region formed in a semiconductor layer, a pinning layer and a depletion adjustment layer. The photodiode region receives visible and infrared light from a light incident side of the image sensor pixel. The pinning layer is disposed between a front surface of the semiconductor layer and the photodiode region, while the depletion adjustment layer is disposed between the pinning layer and the photodiode region. The depletion adjustment layer is configured to adjust a depletion region of the photodiode region to reduce charge carriers induced in the photodiode region by the received infrared light.

A complementary metal-oxide-semiconductor (CMOS) image sensor with silicon and silicon germanium is provided. A silicon germanium layer abuts a silicon layer. A photodetector is arranged in the silicon germanium layer. A transistor is arranged on the silicon layer with a source/drain region that is buried in a surface of the silicon layer and that is electrically coupled to the photodetector. A method for manufacturing the CMOS image sensor is also provided.

Apparatuses and methods for charge transfer in image sensors are disclosed. One example of an image sensor pixel may include a first charge storage node and a second charge storage node. A transfer circuit may be coupled between the first and second charge storage nodes, and the transfer circuit may have a first region proximate the first charge storage node and configured to have a first potential. The transfer circuit may also have a second region proximate the second charge storage node configured to have a second, higher potential. An input node may be configured to control the first and second potentials based on a transfer signal provided to the input node.

High field-effect mobility is provided for a transistor including an oxide semiconductor. Further, a highly reliable semiconductor device including the transistor is provided. In a bottom-gate transistor including an oxide semiconductor layer, an oxide semiconductor layer functioning as a current path (channel) of the transistor is sandwiched between oxide semiconductor layers having lower carrier densities than the oxide semiconductor layer. In such a structure, the channel is formed away from the interface of the oxide semiconductor stacked layer with an insulating layer in contact with the oxide semiconductor stacked layer, i.e., a buried channel is formed.

The present invention relates to a semiconductor photosensitive unit and a semiconductor photosensitive unit array thereof, including a floating gate transistor, a gating MOS transistor and a photodiode that are disposed on a semiconductor substrate. An anode or a cathode of the photodiode is connected to a floating gate of the floating gate transistor through the gating MOS transistor, and the corresponding cathode or anode of the photodiode is connected to a drain of the floating gate transistor or connected to an external electrode. After the gating MOS transistor is switched on, the floating gate is charged or discharged through the photodiode; and after the gating MOS transistor is switched off, charges are stored in the floating gate of the floating gate transistor. Advantages like a small unit area, low surface noise, long charge storage time of the floating gate, and large dynamic range of an operating voltage are achieved.

A method of clocking an image sensor which eliminates well bounce effects caused by global current flow in large image sensors during frame readout and line transfer is described. During charge transfer operations in which voltages are applied to VCCD gate contacts that are adjacent to the photodiodes, a compensating voltage may be applied to the lightshield that is associated with, and at least partially formed over the photodiode. Depending on polarity, the compensating lightshield pulse allows holes to locally flow from under the VCCD gates to the photodiode P+ pinning region or vice-versa, and in such a manner to eliminate the global flow of hole current. Lightshields may also be biased during electronic shuttering operations.

A semiconductor device having a structure which can prevent a decrease in electrical characteristics due to miniaturization is provided. The semiconductor device includes, over an insulating surface, a stack in which a first oxide semiconductor layer and a second oxide semiconductor layer are sequentially formed, and a third oxide semiconductor layer covering part of a surface of the stack. The third oxide semiconductor layer includes a first layer in contact with the stack and a second layer over the first layer. The first layer includes a microcrystalline layer, and the second layer includes a crystalline layer in which c-axes are aligned in a direction perpendicular to a surface of the first layer.

An imaging device which does not include a color filter and does not need arithmetic processing using an external processing circuit is provided. A first circuit includes a first photoelectric conversion element, a first transistor, and a second transistor; a second circuit includes a second photoelectric conversion element, a third transistor, and a fourth transistor; a third circuit includes a fifth transistor, a sixth transistor, a seventh transistor, and a second capacitor; the spectroscopic element is provided over the first photoelectric conversion element or the second photoelectric conversion element; and the first circuit and the second circuit is connected to the third circuit through a first capacitor.

A tunneling field effect transistor for light detection, including a p-type region connected to a source terminal, a n-type region connected to a drain terminal, an intrinsic region located between the p-type region and the n-type region to form a P-I junction or an N-I junction with the n-type region or the p-type region, respectively, a first insulating layer and a first gate electrode, the first gate electrode covering a portion of the intrinsic region on one side, and a second insulating layer and a second gate electrode, the second insulating layer and the second gate electrode covering an entire other side of the intrinsic region opposite to the one side, wherein an area of the intrinsic region that is not covered by the first gate electrode forms a non-gated intrinsic area configured for light absorption.