An image sensor structure and methods of forming the same are provided. An image sensor structure according to the present disclosure includes a semiconductor substrate including a photodiode, a transfer gate transistor disposed over the semiconductor substrate and having a first channel area, a first dielectric layer disposed over the semiconductor substrate, a semiconductor layer disposed over the first dielectric layer, a source follower transistor disposed over the semiconductor layer and having a second channel area, a row select transistor disposed over the semiconductor layer and having a third channel area, and a reset transistor disposed over the semiconductor layer and having a fourth channel area. The second channel area is greater than the first channel area, the third channel area or the fourth channel area.

When a semiconductor device including a transistor in which a gate electrode layer, a gate insulating film, and an oxide semiconductor film are stacked and a source and drain electrode layers are provided in contact with the oxide semiconductor film is manufactured, after the formation of the gate electrode layer or the source and drain electrode layers by an etching step, a step of removing a residue remaining by the etching step and existing on a surface of the gate electrode layer or a surface of the oxide semiconductor film and in the vicinity of the surface is performed. The surface density of the residue on the surface of the oxide semiconductor film or the gate electrode layer can be 110.sup.13 atoms/cm.sup.2 or lower.

A display panel includes a display pixel configured to irradiate light, an image sensor pixel included together with the display pixel in one unit pixel, including a thin film transistor (TFT) photodetector including an active layer formed of amorphous silicon or polycrystalline silicon on an amorphous transparent material, and configured to collect light reflected from a body located on the transparent material, and a processor configured to process biometrics along with positioning of the body according to the light reflected from the body.

Disclosed herein is a single photon avalanche diode (SPAD) pixel for use in time-of-flight imaging. This pixel includes a SPAD having a cathode connected to a first node and an anode coupled to first negative voltage. A transistor circuit in the pixel includes a quench transistor connected between a supply voltage node and a second node, the quench transistor controlled by a quench control signal to operate in a high-impedance mode, and a recharge transistor connected in parallel with the quench transistor between the supply voltage node and the second node, the recharge transistor controlled by a feedback signal. The pixel also includes a readout inverter generating an output signal based upon a voltage at the first node and an adjustable delay circuit generating the feedback signal based upon the output signal, the feedback signal being delayed with respect to the output signal.

A semiconductor device having a structure which can prevent a decrease in electrical characteristics due to miniaturization is provided. The semiconductor device includes, over an insulating surface, a stack in which a first oxide semiconductor layer and a second oxide semiconductor layer are sequentially formed, and a third oxide semiconductor layer covering part of a surface of the stack. The third oxide semiconductor layer includes a first layer in contact with the stack and a second layer over the first layer. The first layer includes a microcrystalline layer, and the second layer includes a crystalline layer in which c-axes are aligned in a direction perpendicular to a surface of the first layer.

A buried channel that partially covers a reset gate channel of a pixel for a light sensor is disclosed. The buried channel can lower a potential barrier between a photodiode and the reset gate so that charge can be drained from the photodiode region faster during a reset period. This may result in a shorter reset period that can increase the frame rate of a global shutter.

A pixel of an image sensor includes a semiconductor substrate having a front surface and a back surface opposing the front surface, a photodiode and floating diffusion (FD) region formed in the substrate along a first pixel axis parallel to the front surface and a transfer gate formed in the front surface of the substrate between the photodiode and the FD region. The transfer gate includes a planar gate on the front surface of the substrate, a vertical transfer gate extending into the substrate from the planar gate, the vertical transfer gate further including a trench and a layer of doped semiconductor material epitaxially grown on the sides and bottom of the trench. The semiconductor substrate and the epitaxial layer comprise a first conductive type, and the photodiode and the FD region comprise a second conductive type. An image sensor and method of forming the vertical transfer gate are disclosed.

A method for fabricating an integrated device, the method including: forming a first level including a first mono-crystal layer, where forming the first level includes forming a plurality of single crystal transistors, a plurality of pixel control circuits, and a plurality of recessed channel transistors therein; disposing an overlying oxide on top of the first level; providing a second level including a second mono-crystal layer, where the second mono-crystal layer includes a plurality of image sensors; bonding the second level to the first level via an oxide-to-oxide bond such that the second level overlays the oxide; and including disposing a third level underneath the first level, where the third level includes a plurality of third transistors, and where the plurality of third transistors each include a single crystal channel.

A small-sized and highly functional imaging device is provided. The imaging device includes a photoelectric conversion device formed on a silicon substrate and a transistor including a channel formation region in a silicon epitaxial growth layer formed on the silicon substrate. The transistor provided in the epitaxial growth layer has favorable electrical characteristics, so that the imaging device with little noise can be formed. Since the transistor can be formed so as to have a region overlapping with the photoelectric conversion device, the imaging device can be downsized.

Aspects of the technology described herein relate to improved semiconductor-based image sensor designs. In some embodiments, an integrated circuit may comprise a photodetection region and a drain region electrically coupled to the photodetection region, and the photodetection region may be configured to induce an intrinsic electric field in a direction from the photodetection region to the drain region(s). In some embodiments, an integrated circuit may comprise a plurality of pixels and a control circuit configured to control a transfer of charge carriers in a plurality of time-binning pixels. In some embodiments, an optical component for optical rejection is provided in between a waveguide and the time-binning pixel and configured to block at least some excitation photons in a pulsed light stream from arriving at the photodetection region. In some embodiments, the time-binning pixel does not comprise a time-gated transistor for electronic rejection configured to block a transfer of charge carriers associated with excitation photons in the pulsed light stream.