Patent classifications
H10F39/014
Integrated bio-sensor with nanocavity and fabrication method thereof
A bio-sensor includes a substrate having a light-sensing region thereon. A first dielectric layer, a diffusion barrier layer, and a second dielectric layer are disposed on the substrate. A trenched recess structure is formed in the second dielectric layer, which is filled with a light filter layer that is capped with a cap layer. A first passivation layer and a nanocavity construction layer are disposed on the cap layer. A nanocavity is formed in the nanocavity construction layer. The sidewall and bottom surface of the nanocavity is lined with a second passivation layer.
IMAGE SENSOR CHIP SCALE PACKAGES AND RELATED METHODS
Methods of forming an image sensor chip scale package. Implementations may include providing a semiconductor wafer having a pixel array, forming a first cavity through the wafer and/or one or more layers coupled over the wafer, filling the first cavity with a fill material, planarizing the fill material and/or the one or more layers to form a first surface of the fill material coplanar with a first surface of the one or more layers, and bonding a transparent cover over the fill material and the one or more layers. The bond may be a fusion bond between the transparent cover and a passivation oxide; a fusion bond between the transparent cover and an anti-reflective coating; a bond between the transparent cover and an organic adhesive coupled over the fill material, and/or; a bond between a first metallized surface of the transparent cover and a metallized layer coupled over the wafer.
Crosstalk improvement through P on N structure for image sensor
The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a semiconductor substrate having a first type of dopant; a semiconductor layer having a second type of dopant different from the first type of dopant and disposed on the semiconductor substrate; a photo-sensitive structure formed in the semiconductor layer; a multi-layer interconnect (MLI) structure disposed on the semiconductor layer; a color filter disposed on the MLI structure and disposed above the photo-sensitive structure; and a microlens disposed over the color filter and disposed above the photo-sensitive structure.
Imaging device
An imaging device which does not include a color filter and does not need arithmetic processing using an external processing circuit is provided. A first circuit includes a first photoelectric conversion element, a first transistor, and a second transistor; a second circuit includes a second photoelectric conversion element, a third transistor, and a fourth transistor; a third circuit includes a fifth transistor, a sixth transistor, a seventh transistor, and a second capacitor; the spectroscopic element is provided over the first photoelectric conversion element or the second photoelectric conversion element; and the first circuit and the second circuit is connected to the third circuit through a first capacitor.
Sensor having depth sensing pixel and method of using the same
A sensor includes a plurality of image sensors, wherein each image sensor of the plurality of image sensors is configured to detect a first spectrum of light. The sensor further includes a depth sensing pixel bonded to each image sensor of the plurality of image sensors, wherein the depth sensing pixel is configured to detect a second spectrum of light different from the first spectrum.
Semiconductor device and manufacturing method thereof
An improvement is achieved in the performance of a semiconductor device. A semiconductor device includes an n.sup.-type semiconductor region formed in a p-type well, an n-type semiconductor region formed closer to a main surface of a semiconductor substrate than the n.sup.-type semiconductor region, and a p.sup.-type semiconductor region formed between the n.sup.-type semiconductor region and the n-type semiconductor region. A net impurity concentration in the n.sup.-type semiconductor region is lower than a net impurity concentration in the n-type semiconductor region. A net impurity concentration in the p.sup.-type semiconductor region is lower than a net impurity concentration in the p-type well.
IMAGING DEVICE AND METHOD OF MANUFACTURING THE SAME
A groove-type through hole passing through a silicon layer and a first interlayer insulating film is formed in a region around a chip formation region including a photodiode. In the groove-type through hole, a wall-like wall-type conductive pass-through portion corresponding to the groove-type through hole is formed. An electrode pad is in contact with the wall-type conductive pass-through portion. The electrode pad is electrically connected to a first interconnection through the wall-type conductive pass-through portion.
Photoelectric conversion apparatus and method of manufacturing the same
A method of manufacturing a photoelectric conversion apparatus includes forming a first semiconductor region of a first conductivity type in a trench provided in a semiconductor substrate, forming an insulating member on the semiconductor substrate, and forming a second semiconductor region of a second conductivity type that forms a photoelectric conversion portion. The first semiconductor region is present between the second semiconductor region and the insulating member in a direction perpendicular to a depth direction of the semiconductor substrate.
SOLID-STATE IMAGING DEVICE, METHOD OF MANUFACTURING SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS
The present technique relates to a solid-state imaging device, a solid-state imaging device manufacturing method, and an electronic apparatus that are capable of providing a solid-state imaging device that can prevent generation of RTS noise due to miniaturization of amplifying transistors, and can achieve a smaller size and a higher degree of integration accordingly.
A solid-state imaging device (1-1) includes: a photodiode (PD) as a photoelectric conversion unit; a transfer gate (TG) that reads out charges from the photodiode (PD); a floating diffusion (FD) from which the charges of the photodiode (PD) are read by an operation of the transfer gate (TG); and an amplifying transistor (Tr3) connected to the floating diffusion (FD). More particularly, the amplifying transistor (Tr3) is of a fully-depleted type. Such an amplifying transistor includes an amplifier gate (AG) (gate electrode) extending in a direction perpendicular to convex strips (33) formed by processing a surface layer of a semiconductor layer (11), for example.
Formation of buried color filters in a back side illuminated image sensor using an etching-stop layer
A semiconductor image sensor includes a substrate having a first side and a second side that is opposite the first side. An interconnect structure is disposed over the first side of the substrate. A plurality of radiation-sensing regions is located in the substrate. The radiation-sensing regions are configured to sense radiation that enters the substrate from the second side. A buffer layer is disposed over the second side of the substrate. A plurality of elements is disposed over the buffer layer. The elements and the buffer layer have different material compositions. A plurality of light-blocking structures is disposed over the plurality of elements, respectively. The radiation-sensing regions are respectively aligned with a plurality of openings defined by the light-blocking structures, the elements, and the buffer layer.