The present disclosure relates to a solid-state image capturing element capable of suppressing a dark current, a manufacturing method thereof, and an electronic device. Provided is a solid-state image capturing element including: a photoelectric conversion unit formed outside a semiconductor substrate; and a charge retention section that is formed in the semiconductor substrate and retains charges generated in the photoelectric conversion unit. Among surfaces of the charge retention section, a bottom surface on a side opposite to a surface of a gate side of a transistor formed in the semiconductor substrate is covered by an insulation film. The present disclosure can be applied to, for example, solid-state image capturing elements and the like.

A CMOS detector with pairs of interdigitated elongated finger-like collection gates includes p+ implanted regions that create charge barrier regions that can intentionally be overcome. These regions steer charge to a desired collection gate pair for collection. The p+ implanted regions may be formed before and/or after formation of the collection gates. These regions form charge barrier regions when an associated collection gate is biased low. The barriers are overcome when an associated collection gate is high. These barrier regions steer substantially all charge to collection gates that are biased high, enhancing modulation contrast. Advantageously, the resultant structure has reduced power requirements in that inter-gate capacitance is reduced in that inter-gate spacing can be increased over prior art gate spacing and lower swing voltages may be used. Also higher modulation contrast is achieved in that the charge collection area of the low gate(s) is significantly reduced.

A solid-state imaging device is provided, which includes a photodiode having a first conductivity type semiconductor area that is dividedly formed for each pixel; a first conductivity type transfer gate electrode formed on the semiconductor substrate via a gate insulating layer in an area neighboring the photodiode, and transmitting signal charges generated and accumulated in the photodiode; a signal reading unit reading a voltage which corresponds to the signal charge or the signal charge; and an inversion layer induction electrode formed on the semiconductor substrate via the gate insulating layer in an area covering a portion or the whole of the photodiode, and composed of a conductor or a semiconductor having a work function. An inversion layer is induced, which is formed by accumulating a second conductivity type carrier on a surface of the inversion layer induction electrode side of the semiconductor area through the inversion layer induction electrode.

An active pixel sensor (APS) with a vertical transfer gate and a pixel transistor (e.g., a transfer transistor, a source follower transistor, a reset transistor, or a row select transistor) electrically isolated by an implant isolation region is provided. A semiconductor substrate has a photodetector buried therein. The vertical transfer gate extends into the semiconductor substrate with a channel region in electrical communication with the photodetector. The pixel transistor is arranged over the photodetector and configured to facilitate the pixel operation (e.g., reset, signal readout, etc.). The implant isolation region is arranged in the semiconductor substrate and surrounds and electrically isolates the pixel transistor. A method for manufacturing the APS is also provided.

An image sensor is provided which is capable of holding data for one frame period or longer and conducting a difference operation with a small number of elements. A photosensor is provided in each of a plurality of pixels arranged in a matrix, each pixel accumulates electric charge in a data holding portion for one frame period or longer, and an output of the photosensor changes in accordance with the electric charge accumulated in the data holding portion. As a writing switch element for the data holding portion, a transistor with small leakage current (sufficiently smaller than 110.sup.14 A) is used. As an example of the transistor with small leakage current, there is a transistor having a channel formed in an oxide semiconductor layer.

Provided is a solid-state imaging device including: a pixel section configured to include a plurality of pixels arranged in a matrix form, the plurality of pixels performing photoelectric conversion; column signal lines configured to transmit pixel signals output from the pixels in units of columns; an AD converting section configured to include a comparator that compares a reference signal serving as a ramp wave with the pixel signals transmitted via the column signal line and convert a reference level and a signal level of the pixel signals into digital signals independently based on a comparison result of the comparator; a switch configured to be connected with the column signal lines; and a control section configured to turn on the switch only during a certain period of time in a period of time in which the comparator is reset and cause the column signal lines to be short-circuited.

The present disclosure relates to a semiconductor device and an electronic apparatus capable of reducing a leak current of a PN junction region. In a Si substrate, an N+ region is formed in a P-type Well (P_Well region). A depletion layer is formed in the circumference of a boundary (metallurgic boundary of a PN junction) between the P_Well region and the N+ region. On the surface of the Si substrate, a fixed charge layer having positive fixed charge is formed on the N+ region to be spanned to the depletion layer. The present disclosure is applicable to a CMOS solid-state imaging device used in an imaging apparatus such as a camera.

An image sensor includes at least one pixel with a transfer gate that is controllable among at least three biasing conditions, including a first biasing condition in which electrons are transferable from a photodiode to a potential well under the transfer gate, a second biasing condition in which the electrons are confined in the potential well under the transfer gate, and a third biasing condition in which the electrons are transferable out of the potential well under the transfer gate. The pixel includes a p+ type doped barrier implant located at least partially under a portion of the transfer gate, and a pinned charge transfer barrier located on the opposite side of the transfer gate from the photodiode that includes a p+ type doped region and an n-type doped region. The image sensor can operate in a global shutter mode and/or a rolling shutter mode.

A solid-state imaging device includes: multiple pixels. Each pixel is arranged at a surface layer portion of a semiconductor substrate, and includes: a photoelectric conversion portion that converts light incident into an electric charge; a charge holding portion that stores the electric charge, and is arranged in the semiconductor substrate; a multiplication gate electrode that is capacitively coupled with the charge holding portion, and is arranged on the semiconductor substrate via an insulation film; and a charge barrier portion that is arranged between the charge holding portion and the insulation film, and has a higher impurity concentration than the semiconductor substrate.

A radiation tolerant optical detection element includes: a p-type base-body region; a gate insulating film provided on an upper surface of the base-body region; an n-type buried charge-generation region buried in an upper portion of the base-body region; an n-type charge-readout region buried in an upper portion of the base-body region on the inner-contour side of the buried charge-generation region; an n-type reset-drain region buried on the inner-contour side of the charge-readout region; a transparent electrode provided on the gate insulating film above the buried charge-generation region; and a reset-gate electrode provided on a portion of the gate insulating film between the charge-readout region and the reset-drain region.