A method for fabricating an optically transparent conductor including depositing a plurality of metal nanowires on a substrate, annealing or illuminating the plurality of metal nanowires to thermally or optically fuse nanowire junctions between metal nanowires to form a metal nanowire network, disposing a graphene layer over the metal nanowire network to form a nanohybrid layer comprising the graphene layer and the metal nanowire network, depositing a dielectric passivation layer over the nanohybrid layer, patterning the dielectric passivation layer using lithography, printing, or any other method of patterning to define an area for the optically transparent conductor, and etching the patterned dielectric passivation layer to define the optically transparent conductor.

A light absorption apparatus includes a substrate, a light absorption layer above the substrate on a first selected area, a silicon layer above the light absorption layer, a spacer surrounding at least part of the sidewall of the light absorption layer, an isolation layer surrounding at least part of the spacer, wherein the light absorption apparatus can achieve high bandwidth and low dark current.

A photovoltaic device including a single junction solar cell provided by an absorption layer of a type IV semiconductor material having a first conductivity, and an emitter layer of a type III-V semiconductor material having a second conductivity, wherein the type III-V semiconductor material has a thickness that is no greater than 50 nm.

A method for manufacturing a solar cell can include a tunnel layer forming step of forming a tunnel layer on a first surface of a semiconductor substrate, a first conductive type semiconductor region forming step of forming a first conductive type semiconductor region on the first surface of the semiconductor substrate, a second conductive type semiconductor region forming step of forming a second conductive type semiconductor region by doping impurities of a second conductive type into a second surface of the semiconductor substrate, a first passivation film forming step of forming a first passivation film on the first conductive type semiconductor region and an electrode forming step of forming a first electrode connected to the first conductive type semiconductor region and a second electrode connected to the second conductive type semiconductor region.

Reduction of solar wafer LID by exposure to continuous or intermittent High-Intensity full-spectrum Light Radiation, HILR, by an Enhanced Light Source, ELS, producing 3-10 Sols, optionally in the presence of forming gas or/and heating to within the range of from 100 C.-300 C. HILR is provided by ELS modules for stand-alone bulk/continuous processing, or integrated in wafer processing lines in a High-Intensity Light Zone, HILZ, downstream of a wafer firing furnace. A finger drive wafer transport provides continuous shadowless processing speeds of 200-400 inches/minute in the integrated furnace/HILZ. Wafer dwell time in the peak-firing zone is 1-2 seconds. Wafers are immediately cooled from peak firing temperature of 850 C.-1050 C. in a quench zone ahead of the HILZ-ELS modules. Dwell in the HILZ is from about 10 sec to 5 minutes, preferably 10-180 seconds. Intermittent HILR exposure is produced by electronic control, a mask, rotating slotted plate or moving belt.

A process is provided for contacting a nanostructured surface. The process may include (a) providing a substrate having a nanostructured material on a surface, (b) passivating the surface on which the nanostructured material is located, (c) screen printing onto the nanostructured surface and (d) firing the screen printing ink at a high temperature. In some embodiments, the nanostructured material compromises silicon. In some embodiments, the nanostructured material includes silicon nanowires. In some embodiments, the nanowires are around 150 nm, 250 nm, or 400 nm in length. In some embodiments, the nanowires have a diameter range between about 30 nm and about 200 nm. In some embodiments, the nanowires are tapered such that the base is larger than the tip. In some embodiments, the nanowires are tapered at an angle of about 1 degree, about 3 degrees, or about 10 degrees. In some embodiments, a high temperature can be approximately 700 C, 750 C, 800 C, or 850 C.

A method for use in forming a photovoltaic device includes forming a doped semiconductor layer on a surface of a semiconductor substrate and forming a metal film on the doped semiconductor layer. A patterned etched resist is formed on the metal film and a dielectric layer is formed on the doped semiconductor layer and the etched resist. A laser having a wavelength absorbable by the patterned etch resist is applied through the dielectric layer to the patterned etch resist to remove the patterned etch resist.

Solar cells of varying composition are disclosed, generally including a central substrate, conductive layer(s), antireflection layers(s), passivation layer(s) and/or electrode(s). Multifunctional layers provide combined functions of passivation, transparency, sufficient conductivity for vertical carrier flow, the junction, and/or varying degrees of anti-reflectivity. Improved manufacturing methods including single-side CVD deposition processes and thermal treatment for layer formation and/or conversion are also disclosed.

After forming an absorber layer containing cracks over a back contact layer, a passivation layer is formed over a top surface of the absorber layer and interior surfaces of the cracks. The passivation layer is deposited in a manner such that that the cracks in the absorber layer are fully passivated by the passivation layer. An emitter layer is then formed over the passivation layer to pinch off upper portions of the cracks, leaving voids in lower portions of the cracks.

Disclosed are a solar cell and a method for manufacturing the same. A solar cell includes a semiconductor substrate, a tunnel layer on the first surface of the semiconductor substrate, a first conductive type semiconductor region on the tunnel layer and includes impurities of a first conductive type, a second conductive type semiconductor region on a second surface and includes impurities of a second conductive type opposite the first conductive type, a first passivation film on the first conductive type semiconductor region, a first electrode formed on the first passivation film and connected to the first conductive type semiconductor region through an opening portion formed in the first passivation film, a second passivation film on the second conductive type semiconductor region, and a second electrode formed on the second passivation film and connected to the second conductive type semiconductor region through an opening portion formed in the second passivation film.